net/octeontx2: support CN98xx
authorHarman Kalra <hkalra@marvell.com>
Wed, 24 Jun 2020 12:46:48 +0000 (18:16 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 30 Jun 2020 12:52:30 +0000 (14:52 +0200)
commit9311beeea4963d8b97330c20ff1736b006486c5d
tree82e0c4ad788cbefad7b073f399044ca305936173
parent420bbdae89f29744847a166b831c675ad5affd2a
net/octeontx2: support CN98xx

New cn98xx SOC comes up with two NIX blocks wrt
cn96xx, cn93xx, to achieve higher performance.
Also the no of cores increased to 36 from 24.

Adding support for cn98xx where need a logic to
detect if the LF is attached to NIX0 or NIX1 and
then accordingly use the respective NIX block.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
config/arm/meson.build
config/defconfig_arm64-octeontx2-linuxapp-gcc
doc/guides/platform/octeontx2.rst
doc/guides/rel_notes/release_20_08.rst
drivers/common/octeontx2/hw/otx2_rvu.h
drivers/net/octeontx2/otx2_ethdev.c