net/axgbe: alter port speed bit range
authorSelwin Sebastian <selwin.sebastian@amd.com>
Tue, 25 Jan 2022 12:17:47 +0000 (17:47 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 27 Jan 2022 14:29:24 +0000 (15:29 +0100)
commita935a4c3c72744d4a60403f4c912d104f7a77e06
tree84080e53006e179e3f6634f84155888a966be489
parent443ab5aadae53db2a250c3bfdf5e1c84bbc09d2f
net/axgbe: alter port speed bit range

Newer generation Hardware uses the slightly different
port speed bit widths, so alter the existing port speed
bit range to extend support to the newer generation hardware
while maintaining the backward compatibility with older
generation hardware.

The previously reserved bits are now being used which
then requires the adjustment to the BIT values, e.g.:

Before:
   PORT_PROPERTY_0[22:21] - Reserved
   PORT_PROPERTY_0[26:23] - Supported Speeds

After:
   PORT_PROPERTY_0[21] - Reserved
   PORT_PROPERTY_0[26:22] - Supported Speeds

To make this backwards compatible, the existing BIT
definitions for the port speeds are incremented by one
to maintain the original position.

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
Acked-by: Chandubabu Namburu <chandu@amd.com>
drivers/net/axgbe/axgbe_common.h
drivers/net/axgbe/axgbe_phy_impl.c