eal/x86: fix some CPU extended features definitions
authorDavid Marchand <david.marchand@redhat.com>
Fri, 8 Oct 2021 12:07:14 +0000 (14:07 +0200)
committerDavid Marchand <david.marchand@redhat.com>
Tue, 12 Oct 2021 19:07:50 +0000 (21:07 +0200)
commitaae3037ab1e020f68fa9e662aab31321cffcdc31
tree8e258a1a7d672fafa5939af1760a2de4c9f4f858
parent24d5a1ce6b85aa44b4ddd04f0e7ebe8750a28def
eal/x86: fix some CPU extended features definitions

Caught while checking CPUID related stuff in OVS.

According to [1], for Structured Extended Feature Flags Enumeration Leaf
(EAX = 0x07H, ECX = 0):

- BMI1 is associated to EBX, bit 3 (was incorrectly 2),
- SMEP is associated to EBX, bit 7 (was incorrectly 6),
- BMI2 is associated to EBX, bit 8 (was incorrectly 7),
- ERMS is associated to EBX, bit 9 (was incorrectly 8),

1: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
lib/eal/x86/rte_cpuflags.c