net/mlx5: convert meta register to big-endian
authorAlexander Kozyrev <akozyrev@nvidia.com>
Wed, 16 Jun 2021 14:46:02 +0000 (17:46 +0300)
committerRaslan Darawsheh <rasland@nvidia.com>
Thu, 24 Jun 2021 11:19:53 +0000 (13:19 +0200)
commitb57e414b48c0da58e445e3d2e92a05758632147d
tree7b6e15c1bf594ab3cb6ca2fcb2416114a0fbf264
parentfdd0c046f48b44749d894a4f97070a9359ad9afe
net/mlx5: convert meta register to big-endian

Metadata were stored in the CPU order (little-endian format on x86),
while all the packet header fields are stored in the network order.
That caused wrong results whenever we tried to use metadata value
in the modify_field action: bytes were swapped as a result.

Convert the metadata value into big-endian format before storing it
in the Mellanox NIC to achieve consistent behaviour.

Fixes: 641dbe4fb053 ("net/mlx5: support modify field flow action")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/mlx5_flow_dv.c
drivers/net/mlx5/mlx5_rx.c
drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
drivers/net/mlx5/mlx5_rxtx_vec_neon.h
drivers/net/mlx5/mlx5_rxtx_vec_sse.h