vdpa/mlx5: specify lag port affinity
authorXueming Li <xuemingl@nvidia.com>
Wed, 28 Oct 2020 10:44:39 +0000 (10:44 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 3 Nov 2020 22:35:05 +0000 (23:35 +0100)
commitc783fd433c0cd5dcabde6ec66fdc4b38e7636567
tree1bc5a9b5bbdc6f0dbee39bf882fca97e717cdfb6
parent1cbdad1bf28f9b45a0536c579d91f29ccf92d6e3
vdpa/mlx5: specify lag port affinity

If set TIS lag port affinity to auto, firmware assign port affinity on
each creation with Round Robin. In case of 2 PFs, if create virtq,
destroy and create again, then each virtq will get same port affinity.

To resolve this fw limitation, this patch sets create TIS with specified
affinity for each PF.

Fixes: bff735011078 ("vdpa/mlx5: prepare virtio queues")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
drivers/vdpa/mlx5/mlx5_vdpa.c
drivers/vdpa/mlx5/mlx5_vdpa.h
drivers/vdpa/mlx5/mlx5_vdpa_virtq.c