Rx descriptor contains a valid bit which indicates readiness of the rest
of descriptor words. Hence, the word contains valid bit must be read
prior to other words.
In NEON vector path, two contiguous 8B descriptor are loaded to a single
NEON register. Given vector load ensures no 16B atomicity, read of the
word that includes valid bit could be reordered after read of other words.
In this case, data could be invalid.
Reloaded lower 64b after read barrier. This ensures what fetched is
correct.
Also fixed comments that not pertains to Arm platform architecture.
Fixes: deae85145c64 ("net/bnxt: handle multiple packets per loop in vector Rx") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>