net/mlx5: update source and destination vport translations
authorViacheslav Ovsiienko <viacheslavo@mellanox.com>
Wed, 25 Sep 2019 07:53:32 +0000 (07:53 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 8 Oct 2019 10:14:29 +0000 (12:14 +0200)
commitf07341e7aed3545031061530117d355b753ae776
tree13f8b7d04f2db754b007bf52323dcb74517bdd03
parent09a16bcab7b61acf186c596b5be6c13f3b4c9e65
net/mlx5: update source and destination vport translations

There new kernel/rdma_core [1] supports matching on metadata
register instead of vport field to provide operations over
VF LAG bonding configurations. This patch provides correct
translations for flow matchers and destination port actions
if united E-Switch (for VF LAG) is configured and/or new vport
matching mode is engaged.

[1] http://patchwork.ozlabs.org/cover/1122170/
    "Mellanox, mlx5 vport metadata matching"

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
drivers/net/mlx5/mlx5_flow_dv.c
drivers/net/mlx5/mlx5_prm.h