net/octeontx2: enable error and RAS interrupt in configure
authorVamsi Attunuru <vattunuru@marvell.com>
Fri, 3 Apr 2020 02:20:16 +0000 (07:50 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 21 Apr 2020 11:57:06 +0000 (13:57 +0200)
commitfdbdf2721c56f49290a45d801b6ac13568a6735b
tree5e8b966aa167006cc53bed81967cac9ee84dc87e
parent100f6992429e451206509db036ef5dbe79adedb1
net/octeontx2: enable error and RAS interrupt in configure

Patch adds routines to set/clear nix lf error & ras interrupt enable
registers. These nix lf error interrupts get triggered if there are
any failures during nix lf configuration. This interrupts are enabled
before any hardware configurations initiated on the allocated nix lf.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
drivers/net/octeontx2/otx2_ethdev.c
drivers/net/octeontx2/otx2_ethdev.h
drivers/net/octeontx2/otx2_ethdev_irq.c