Add initial support for Marvell 1000BASE-T PHYs on some X550 platforms.
Firmware owns the link config for Marvell PHYs on these platforms,
software should not touch it.
Also these platforms are not capable of speeds lower than 1Gb.
Signed-off-by: Wei Dai <wei.dai@intel.com>
case X557_PHY_ID2:
phy_type = ixgbe_phy_x550em_ext_t;
break;
case X557_PHY_ID2:
phy_type = ixgbe_phy_x550em_ext_t;
break;
+ case IXGBE_M88E1500_E_PHY_ID:
+ case IXGBE_M88E1543_E_PHY_ID:
+ phy_type = ixgbe_phy_ext_1g_t;
+ break;
default:
phy_type = ixgbe_phy_unknown;
break;
default:
phy_type = ixgbe_phy_unknown;
break;
ixgbe_phy_x550em_kx4,
ixgbe_phy_x550em_xfi,
ixgbe_phy_x550em_ext_t,
ixgbe_phy_x550em_kx4,
ixgbe_phy_x550em_xfi,
ixgbe_phy_x550em_ext_t,
ixgbe_phy_cu_unknown,
ixgbe_phy_qt,
ixgbe_phy_xaui,
ixgbe_phy_cu_unknown,
ixgbe_phy_qt,
ixgbe_phy_xaui,
*speed = IXGBE_LINK_SPEED_10GB_FULL;
} else {
switch (hw->phy.type) {
*speed = IXGBE_LINK_SPEED_10GB_FULL;
} else {
switch (hw->phy.type) {
+ case ixgbe_phy_ext_1g_t:
case ixgbe_phy_sgmii:
*speed = IXGBE_LINK_SPEED_1GB_FULL;
break;
case ixgbe_phy_sgmii:
*speed = IXGBE_LINK_SPEED_1GB_FULL;
break;
phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
break;
phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
break;
+ case ixgbe_phy_ext_1g_t:
+ /* link is managed by FW */
+ phy->ops.setup_link = NULL;
+ break;
case ixgbe_phy_x550em_xfi:
/* link is managed by HW */
phy->ops.setup_link = NULL;
case ixgbe_phy_x550em_xfi:
/* link is managed by HW */
phy->ops.setup_link = NULL;
case ixgbe_phy_sgmii:
physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX;
break;
case ixgbe_phy_sgmii:
physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX;
break;
+ case ixgbe_phy_ext_1g_t:
+ physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T;
+ break;