Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Yong Wang <yongwang@vmware.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
#ifndef _VMXNET3_ETHDEV_H_
#define _VMXNET3_ETHDEV_H_
#ifndef _VMXNET3_ETHDEV_H_
#define _VMXNET3_ETHDEV_H_
#define VMXNET3_MAX_MAC_ADDRS 1
/* UPT feature to negotiate */
#define VMXNET3_MAX_MAC_ADDRS 1
/* UPT feature to negotiate */
/* Config space read/writes */
/* Config space read/writes */
-#define VMXNET3_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define VMXNET3_PCI_REG(reg) rte_read32(reg)
static inline uint32_t
vmxnet3_read_addr(volatile void *addr)
static inline uint32_t
vmxnet3_read_addr(volatile void *addr)
return VMXNET3_PCI_REG(addr);
}
return VMXNET3_PCI_REG(addr);
}
-#define VMXNET3_PCI_REG_WRITE(reg, value) do { \
- VMXNET3_PCI_REG((reg)) = (value); \
-} while(0)
+#define VMXNET3_PCI_REG_WRITE(reg, value) rte_write32((value), (reg))
#define VMXNET3_PCI_BAR0_REG_ADDR(hw, reg) \
((volatile uint32_t *)((char *)(hw)->hw_addr0 + (reg)))
#define VMXNET3_PCI_BAR0_REG_ADDR(hw, reg) \
((volatile uint32_t *)((char *)(hw)->hw_addr0 + (reg)))