We were hardcoding the max MAC addresses to 32, while the HW
can support more than that. This was restricting the number of VMDQ
pools that we could support. Use the value obtained from FW instead.
Fixes:
804e746c7b73 ("net/bnxt: add hardware resource manager init code")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
/* MAC Specifics */
dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
/* MAC Specifics */
- dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
+ dev_info->max_mac_addrs = bp->max_l2_ctx;
dev_info->max_hash_mac_addrs = 0;
/* PF/VF specifics */
dev_info->max_hash_mac_addrs = 0;
/* PF/VF specifics */
goto error_free;
}
eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
goto error_free;
}
eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
- ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
+ ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
if (eth_dev->data->mac_addrs == NULL) {
RTE_LOG(ERR, PMD,
"Failed to alloc %u bytes needed to store MAC addr tbl",
if (eth_dev->data->mac_addrs == NULL) {
RTE_LOG(ERR, PMD,
"Failed to alloc %u bytes needed to store MAC addr tbl",
- ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
+ ETHER_ADDR_LEN * bp->max_l2_ctx);
rc = -ENOMEM;
goto error_free;
}
rc = -ENOMEM;
goto error_free;
}
* by ethtool.
*/
if (vnic->flags & BNXT_VNIC_INFO_BCAST)
* by ethtool.
*/
if (vnic->flags & BNXT_VNIC_INFO_BCAST)
- mask = HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST;
+ mask |= HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST;
if (vnic->flags & BNXT_VNIC_INFO_UNTAGGED)
mask |= HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN;
if (vnic->flags & BNXT_VNIC_INFO_PROMISC)
if (vnic->flags & BNXT_VNIC_INFO_UNTAGGED)
mask |= HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN;
if (vnic->flags & BNXT_VNIC_INFO_PROMISC)
int bnxt_mq_rx_configure(struct bnxt *bp)
{
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
int bnxt_mq_rx_configure(struct bnxt *bp)
{
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
+ const struct rte_eth_vmdq_rx_conf *conf =
+ &dev_conf->rx_adv_conf.vmdq_rx_conf;
unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
int start_grp_id, end_grp_id = 1, rc = 0;
struct bnxt_vnic_info *vnic;
unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
int start_grp_id, end_grp_id = 1, rc = 0;
struct bnxt_vnic_info *vnic;
/* Multi-queue mode */
if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
/* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
/* Multi-queue mode */
if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
/* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
- const struct rte_eth_vmdq_rx_conf *conf =
- &dev_conf->rx_adv_conf.vmdq_rx_conf;
-
switch (dev_conf->rxmode.mq_mode) {
case ETH_MQ_RX_VMDQ_RSS:
switch (dev_conf->rxmode.mq_mode) {
case ETH_MQ_RX_VMDQ_RSS:
rxq = bp->eth_dev->data->rx_queues[ring_idx];
rxq->vnic = vnic;
}
rxq = bp->eth_dev->data->rx_queues[ring_idx];
rxq->vnic = vnic;
}
+ if (i == 0) {
+ if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
+ bp->eth_dev->data->promiscuous = 1;
+ vnic->flags |= BNXT_VNIC_INFO_PROMISC;
+ }
vnic->func_default = true;
vnic->func_default = true;
vnic->ff_pool_idx = i;
vnic->start_grp_id = start_grp_id;
vnic->end_grp_id = end_grp_id;
vnic->ff_pool_idx = i;
vnic->start_grp_id = start_grp_id;
vnic->end_grp_id = end_grp_id;
rc = -ENOMEM;
goto err_out;
}
rc = -ENOMEM;
goto err_out;
}
+ for (j = 0; j < conf->nb_pool_maps; j++) {
+ if (conf->pool_map[j].pools & (1UL << i)) {
+ RTE_LOG(ERR, PMD,
+ "Add vlan %u to vmdq pool %u\n",
+ conf->pool_map[j].vlan_id, i);
+
+ filter->l2_ivlan = conf->pool_map[j].vlan_id;
+ filter->enables |=
+ HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
+ }
+ }
/*
* TODO: Configure & associate CFA rule for
* each VNIC for each VMDq with MACVLAN, MACVLAN+TC
/*
* TODO: Configure & associate CFA rule for
* each VNIC for each VMDq with MACVLAN, MACVLAN+TC