baseband/turbo_sw: support FlexRAN 1.4.0
authorKamil Chalupnik <kamilx.chalupnik@intel.com>
Wed, 9 May 2018 14:14:29 +0000 (16:14 +0200)
committerPablo de Lara <pablo.de.lara.guarch@intel.com>
Thu, 10 May 2018 16:46:20 +0000 (17:46 +0100)
Adjusting BaseBand drivers code to changes in FlexRAN 1.4.0:
- update usage of crc functions after API changes

Update the documentation describing Wireless Baseband Device:
- FlexRAN releases mapping table added
- download and build instructions for BBDEV turbo_sw driver in
  compliance with FlexRAN 1.4.0 release added

Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
doc/guides/bbdevs/turbo_sw.rst
drivers/baseband/turbo_sw/bbdev_turbo_software.c

index b3fed16..996b2a2 100644 (file)
@@ -40,24 +40,37 @@ FlexRAN SDK Download
 ~~~~~~~~~~~~~~~~~~~~
 
 To build DPDK with the *turbo_sw* PMD the user is required to download
 ~~~~~~~~~~~~~~~~~~~~
 
 To build DPDK with the *turbo_sw* PMD the user is required to download
-the export controlled ``FlexRAN SDK`` Libraries. An account at Intel Resource
-Design Center needs to be registered from
-`<https://www.intel.com/content/www/us/en/design/resource-design-center.html>`_.
+the export controlled ``FlexRAN SDK`` Libraries. An account at `Intel Resource
+Design Center <https://www.intel.com/content/www/us/en/design/resource-design-center.html>`_
+needs to be registered.
 
 Once registered, the user needs to log in, and look for
 
 Once registered, the user needs to log in, and look for
-*Intel SWA_SW_FlexRAN_Release_Package R1_3_0* and click for download. Or use
-this direct download link `<https://cdrd.intel.com/v1/dl/getContent/575367>`_.
+*Intel FlexRAN Software Release Package 1_4_0* to download or directly through
+this `link <https://cdrdv2.intel.com/v1/dl/getContent/576288>`_.
 
 After download is complete, the user needs to unpack and compile on their
 system before building DPDK.
 
 
 After download is complete, the user needs to unpack and compile on their
 system before building DPDK.
 
+The following table maps DPDK versions with past FlexRAN SDK releases:
+
+.. _table_flexran_releases:
+
+.. table:: DPDK and FlexRAN SDK releases compliance
+
+   =====================  ============================
+   DPDK version           FlexRAN SDK release
+   =====================  ============================
+   18.02                  1.3.0
+   18.05                  1.4.0
+   =====================  ============================
+
 FlexRAN SDK Installation
 ~~~~~~~~~~~~~~~~~~~~~~~~
 
 The following are pre-requisites for building FlexRAN SDK Libraries:
  (a) An AVX2 supporting machine
  (b) Windriver TS 2 or CentOS 7 operating systems
 FlexRAN SDK Installation
 ~~~~~~~~~~~~~~~~~~~~~~~~
 
 The following are pre-requisites for building FlexRAN SDK Libraries:
  (a) An AVX2 supporting machine
  (b) Windriver TS 2 or CentOS 7 operating systems
- (c) Intel ICC compiler installed
+ (c) Intel ICC 17.0.3 compiler installed
 
 The following instructions should be followed in this exact order:
 
 
 The following instructions should be followed in this exact order:
 
@@ -68,30 +81,19 @@ The following instructions should be followed in this exact order:
         source <path-to-icc-compiler-install-folder>/linux/bin/compilervars.sh intel64 -platform linux
 
 
         source <path-to-icc-compiler-install-folder>/linux/bin/compilervars.sh intel64 -platform linux
 
 
-#. Extract the ``FlexRAN-1.3.0.tar.gz.zip`` package, then run the SDK extractor
-   script and accept the license:
+#. Extract the ``576288-576288-intel-swa-sw-flexran-release-package-r1-4-0.zip``
+   package, then run the SDK extractor script and accept the license:
 
     .. code-block:: console
 
 
     .. code-block:: console
 
-        cd <path-to-workspace>/FlexRAN-1.3.0/
-        ./SDK-R1.3.0.sh
-
-#. To allow ``FlexRAN SDK R1.3.0`` to work with bbdev properly, the following
-   hotfix is required. Change the return of function ``rate_matching_turbo_lte_avx2()``
-   located in file
-   ``<path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/source/phy/lib_rate_matching/phy_rate_match_avx2.cpp``
-   to return 0 instead of 1.
-
-    .. code-block:: c
-
-        -  return 1;
-        +  return 0;
+        cd <path-to-workspace>/FlexRAN-1.4.0/
+        ./SDK-R1.4.0.sh
 
 #. Generate makefiles based on system configuration:
 
     .. code-block:: console
 
 
 #. Generate makefiles based on system configuration:
 
     .. code-block:: console
 
-        cd <path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/
+        cd <path-to-workspace>/FlexRAN-1.4.0/SDK-R1.4.0/sdk/
         ./create-makefiles-linux.sh
 
 #. A build folder is generated in this form ``build-<ISA>-<CC>``, enter that
         ./create-makefiles-linux.sh
 
 #. A build folder is generated in this form ``build-<ISA>-<CC>``, enter that
@@ -118,8 +120,8 @@ Example:
 
 .. code-block:: console
 
 
 .. code-block:: console
 
-    export FLEXRAN_SDK=<path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/build-avx2-icc/install
-    export DIR_WIRELESS_SDK=<path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/
+    export FLEXRAN_SDK=<path-to-workspace>/FlexRAN-1.4.0/SDK-R1.4.0/sdk/build-avx2-icc/install
+    export DIR_WIRELESS_SDK=<path-to-workspace>/FlexRAN-1.4.0/SDK-R1.4.0/sdk/
 
 
 * Set ``CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y`` in DPDK common configuration
 
 
 * Set ``CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y`` in DPDK common configuration
index 302abf5..26b8560 100644 (file)
@@ -462,6 +462,7 @@ process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
        uint8_t *in, *out0, *out1, *out2, *tmp_out, *rm_out;
        struct rte_bbdev_op_turbo_enc *enc = &op->turbo_enc;
        struct bblib_crc_request crc_req;
        uint8_t *in, *out0, *out1, *out2, *tmp_out, *rm_out;
        struct rte_bbdev_op_turbo_enc *enc = &op->turbo_enc;
        struct bblib_crc_request crc_req;
+       struct bblib_crc_response crc_resp;
        struct bblib_turbo_encoder_request turbo_req;
        struct bblib_turbo_encoder_response turbo_resp;
        struct bblib_rate_match_dl_request rm_req;
        struct bblib_turbo_encoder_request turbo_req;
        struct bblib_turbo_encoder_response turbo_resp;
        struct bblib_rate_match_dl_request rm_req;
@@ -482,13 +483,11 @@ process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
                 * it by 3 CRC bytes
                 */
                rte_memcpy(q->enc_in, in, (k - 24) >> 3);
                 * it by 3 CRC bytes
                 */
                rte_memcpy(q->enc_in, in, (k - 24) >> 3);
-               crc_req.data = q->enc_in;
+               crc_req.data = in;
                crc_req.len = (k - 24) >> 3;
                crc_req.len = (k - 24) >> 3;
-               if (bblib_lte_crc24a_gen(&crc_req) == -1) {
-                       op->status |= 1 << RTE_BBDEV_CRC_ERROR;
-                       rte_bbdev_log(ERR, "CRC24a generation failed");
-                       return;
-               }
+               crc_resp.data = q->enc_in;
+               bblib_lte_crc24a_gen(&crc_req, &crc_resp);
+
                in = q->enc_in;
        } else if (enc->op_flags & RTE_BBDEV_TURBO_CRC_24B_ATTACH) {
                /* CRC24B */
                in = q->enc_in;
        } else if (enc->op_flags & RTE_BBDEV_TURBO_CRC_24B_ATTACH) {
                /* CRC24B */
@@ -501,13 +500,11 @@ process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
                 * it by 3 CRC bytes
                 */
                rte_memcpy(q->enc_in, in, (k - 24) >> 3);
                 * it by 3 CRC bytes
                 */
                rte_memcpy(q->enc_in, in, (k - 24) >> 3);
-               crc_req.data = q->enc_in;
+               crc_req.data = in;
                crc_req.len = (k - 24) >> 3;
                crc_req.len = (k - 24) >> 3;
-               if (bblib_lte_crc24b_gen(&crc_req) == -1) {
-                       op->status |= 1 << RTE_BBDEV_CRC_ERROR;
-                       rte_bbdev_log(ERR, "CRC24b generation failed");
-                       return;
-               }
+               crc_resp.data = q->enc_in;
+               bblib_lte_crc24b_gen(&crc_req, &crc_resp);
+
                in = q->enc_in;
        } else {
                ret = is_enc_input_valid(k, k_idx, total_left);
                in = q->enc_in;
        } else {
                ret = is_enc_input_valid(k, k_idx, total_left);