HINIC_PORT_CMD_UP_TC_GET_FLOW = 0xb1,
HINIC_PORT_CMD_UP_TC_FLUSH_TCAM = 0xb2,
HINIC_PORT_CMD_UP_TC_CTRL_TCAM_BLOCK = 0xb3,
+ HINIC_PORT_CMD_UP_TC_ENABLE = 0xb4,
HINIC_PORT_CMD_SET_IPSU_MAC = 0xcb,
HINIC_PORT_CMD_GET_IPSU_MAC = 0xcc,
return err;
}
+int hinic_set_fdir_tcam_rule_filter(void *hwdev, bool enable)
+{
+ struct hinic_port_tcam_info port_tcam_cmd;
+ u16 out_size = sizeof(port_tcam_cmd);
+ int err;
+
+ if (!hwdev)
+ return -EINVAL;
+
+ memset(&port_tcam_cmd, 0, sizeof(port_tcam_cmd));
+ port_tcam_cmd.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
+ port_tcam_cmd.func_id = hinic_global_func_id(hwdev);
+ port_tcam_cmd.tcam_enable = (u8)enable;
+
+ err = l2nic_msg_to_mgmt_sync(hwdev, HINIC_PORT_CMD_UP_TC_ENABLE,
+ &port_tcam_cmd, sizeof(port_tcam_cmd),
+ &port_tcam_cmd, &out_size);
+ if ((port_tcam_cmd.mgmt_msg_head.status != HINIC_MGMT_CMD_UNSUPPORTED &&
+ port_tcam_cmd.mgmt_msg_head.status) || err || !out_size) {
+ if (err == HINIC_MBOX_VF_CMD_ERROR &&
+ HINIC_IS_VF((struct hinic_hwdev *)hwdev)) {
+ err = HINIC_MGMT_CMD_UNSUPPORTED;
+ PMD_DRV_LOG(WARNING, "VF doesn't support setting fdir tcam filter");
+ return err;
+ }
+ PMD_DRV_LOG(ERR, "Set fdir tcam filter failed, err: %d, "
+ "status: 0x%x, out size: 0x%x, enable: 0x%x",
+ err, port_tcam_cmd.mgmt_msg_head.status, out_size,
+ enable);
+ return -EFAULT;
+ }
+
+ if (port_tcam_cmd.mgmt_msg_head.status == HINIC_MGMT_CMD_UNSUPPORTED) {
+ err = HINIC_MGMT_CMD_UNSUPPORTED;
+ PMD_DRV_LOG(WARNING, "Fw doesn't support setting fdir tcam filter");
+ }
+
+ return err;
+}
+
+
u32 key;
};
+struct hinic_port_tcam_info {
+ struct hinic_mgmt_msg_head mgmt_msg_head;
+
+ u16 func_id;
+ u8 tcam_enable;
+ u8 rsvd1;
+ u32 rsvd2;
+};
+
#define HINIC_MAX_TCAM_RULES_NUM (10240)
#define HINIC_TCAM_BLOCK_ENABLE 1
#define HINIC_TCAM_BLOCK_DISABLE 0
int hinic_flush_tcam_rule(void *hwdev);
+int hinic_set_fdir_tcam_rule_filter(void *hwdev, bool enable);
+
#endif /* _HINIC_PMD_NICCFG_H_ */
{
(void)hinic_set_fdir_filter(nic_dev->hwdev, 0, 0, 0, false);
+ (void)hinic_set_fdir_tcam_rule_filter(nic_dev->hwdev, false);
+
(void)hinic_clear_fdir_tcam(nic_dev->hwdev, TCAM_PKT_BGP_DPORT);
(void)hinic_clear_fdir_tcam(nic_dev->hwdev, TCAM_PKT_BGP_SPORT);
fdir_tcam_rule->index);
return rc;
}
+
+ rc = hinic_set_fdir_tcam_rule_filter(nic_dev->hwdev, true);
+ if (rc && rc != HINIC_MGMT_CMD_UNSUPPORTED) {
+ (void)hinic_set_fdir_filter(nic_dev->hwdev, 0, 0, 0,
+ false);
+ (void)hinic_del_tcam_rule(nic_dev->hwdev,
+ fdir_tcam_rule->index);
+ return rc;
+ }
}
TAILQ_INSERT_TAIL(&tcam_info->tcam_list, tcam_filter, entries);
(void)hinic_set_fdir_filter(nic_dev->hwdev, 0, 0, 0, false);
+ (void)hinic_set_fdir_tcam_rule_filter(nic_dev->hwdev, false);
+
(void)hinic_flush_tcam_rule(nic_dev->hwdev);
}