net/ice/base: add 1G SGMII PHY type
authorQi Zhang <qi.z.zhang@intel.com>
Mon, 15 Jun 2020 02:05:13 +0000 (10:05 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 16 Jun 2020 17:21:08 +0000 (19:21 +0200)
There isn't a case for 1G SGMII in ice_get_media_type() so add
the handling for it.

Also handle the special case where some direct attach
cables may report that they support 1G SGMII, but
that is erroneous since SGMII is supposed to be a
backplane media type (between a MAC and a PHY). If
the driver doesn't handle this special case then a
user could see the 'Port' in ethtool change from
'Direct attach Copper' to 'Backplane' when they have
forced the speed to 1G, but the cable hasn't changed.

Lastly, change ice_aq_get_phy_caps() to save the
module_type info if the function was called with
ICE_AQC_REPORT_TOPO_CAP. This call uses the media
information to populate the module_type. If no
media is present then the values in module_type
will be 0.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
drivers/net/ice/base/ice_adminq_cmd.h
drivers/net/ice/base/ice_common.c

index d9d4363..f480917 100644 (file)
@@ -1382,6 +1382,7 @@ struct ice_aqc_get_phy_caps_data {
        u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
 #define ICE_AQC_MOD_TYPE_BYTE0_SFP_PLUS                        0xA0
 #define ICE_AQC_MOD_TYPE_BYTE0_QSFP_PLUS               0x80
+#define ICE_AQC_MOD_TYPE_IDENT                         1
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE     BIT(0)
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE      BIT(1)
 #define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_SR             BIT(4)
index 1d28a13..2c822d7 100644 (file)
@@ -197,6 +197,10 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
        if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {
                pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
                pi->phy.phy_type_high = LE64_TO_CPU(pcaps->phy_type_high);
+               ice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type,
+                          sizeof(pi->phy.link_info.module_type),
+                          ICE_NONDMA_TO_NONDMA);
+
        }
 
        return status;
@@ -269,6 +273,18 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
                return ICE_MEDIA_UNKNOWN;
 
        if (hw_link_info->phy_type_low) {
+               /* 1G SGMII is a special case where some DA cable PHYs
+                * may show this as an option when it really shouldn't
+                * be since SGMII is meant to be between a MAC and a PHY
+                * in a backplane. Try to detect this case and handle it
+                */
+               if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII &&
+                   (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+                   ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE ||
+                   hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+                   ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE))
+                       return ICE_MEDIA_DA;
+
                switch (hw_link_info->phy_type_low) {
                case ICE_PHY_TYPE_LOW_1000BASE_SX:
                case ICE_PHY_TYPE_LOW_1000BASE_LX:
@@ -2474,10 +2490,6 @@ enum ice_status ice_update_link_info(struct ice_port_info *pi)
 
                status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,
                                             pcaps, NULL);
-               if (status == ICE_SUCCESS)
-                       ice_memcpy(li->module_type, &pcaps->module_type,
-                                  sizeof(li->module_type),
-                                  ICE_NONDMA_TO_NONDMA);
 
                ice_free(hw, pcaps);
        }