#define ENETC_G_EIPBRR0                        0x00bf8
 #define ENETC_G_EIPBRR1                        0x00bfc
 
-
 /* MAC Counters */
+/* Config register to reset counters*/
+#define ENETC_PM0_STAT_CONFIG          0x080E0
+/* Receive frames counter without error */
+#define ENETC_PM0_RFRM                 0x08120
+/* Receive packets counter, good + bad */
+#define ENETC_PM0_RPKT                 0x08160
+/* Received octets, good + bad */
+#define ENETC_PM0_REOCT                        0x08120
+/* Transmit octets, good + bad */
+#define ENETC_PM0_TEOCT                        0x08200
+/* Transmit frames counter without error */
+#define ENETC_PM0_TFRM                 0x08220
+/* Transmit packets counter, good + bad */
+#define ENETC_PM0_TPKT                 0x08260
+/* Dropped not Truncated packets counter */
+#define ENETC_PM0_RDRNTP               0x081C8
+/* Dropped + trucated packets counter */
+#define ENETC_PM0_RDRP                 0x08158
+/* Receive packets error counter */
+#define ENETC_PM0_RERR                 0x08138
+/* Transmit packets error counter */
+#define ENETC_PM0_TERR                 0x08238
+
+/* Stats Reset Bit*/
+#define ENETC_CLEAR_STATS              BIT(2)
+
 #define ENETC_G_EPFBLPR(n)             (0xd00 + 4 * (n))
 #define ENETC_G_EPFBLPR1_XGMII         0x80000000
 
 
                const struct rte_eth_txconf *tx_conf);
 static void enetc_tx_queue_release(void *txq);
 static const uint32_t *enetc_supported_ptypes_get(struct rte_eth_dev *dev);
+static int enetc_stats_get(struct rte_eth_dev *dev,
+               struct rte_eth_stats *stats);
+static void enetc_stats_reset(struct rte_eth_dev *dev);
 
 /*
  * The set of PCI devices this driver supports
        .dev_stop             = enetc_dev_stop,
        .dev_close            = enetc_dev_close,
        .link_update          = enetc_link_update,
+       .stats_get            = enetc_stats_get,
+       .stats_reset          = enetc_stats_reset,
        .dev_infos_get        = enetc_dev_infos_get,
        .rx_queue_setup       = enetc_rx_queue_setup,
        .rx_queue_release     = enetc_rx_queue_release,
        rte_free(rx_ring);
 }
 
+static
+int enetc_stats_get(struct rte_eth_dev *dev,
+                   struct rte_eth_stats *stats)
+{
+       struct enetc_eth_hw *hw =
+               ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+       struct enetc_hw *enetc_hw = &hw->hw;
+
+       /* Total received packets, bad + good, if we want to get counters of
+        * only good received packets then use ENETC_PM0_RFRM,
+        * ENETC_PM0_TFRM registers.
+        */
+       stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
+       stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
+       stats->ibytes =  enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
+       stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
+       /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
+        * truncated packets
+        */
+       stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
+       stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
+       stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
+
+       return 0;
+}
+
+static void
+enetc_stats_reset(struct rte_eth_dev *dev)
+{
+       struct enetc_eth_hw *hw =
+               ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+       struct enetc_hw *enetc_hw = &hw->hw;
+
+       enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
+}
+
 static int
 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                           struct rte_pci_device *pci_dev)