net/hns3: set max scheduling rate based on actual board

Currently, max scheduling rates configuration of pg, pri and port are
set to 100000Mbps, which is the maximum bandwidth of hns3 network engine
with revision_id equals 0x21. However, max scheduling rate configuration
should be set to hardware based on the actual hardware board
environment.

The max_tm_rate in struct hns3_hw, meaning the rate, is obtained from
firmware. So we should use the variable to configure the max scheduling
rate.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>

diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index 857e79e..27ae014 100644 (file)
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -62,9 +62,9 @@ hns3_shaper_para_calc(struct hns3_hw *hw, uint32_t ir, uint8_t shaper_level,
                return -EINVAL;
        }
 
-       if (ir > HNS3_ETHER_MAX_RATE) {
-               hns3_err(hw, "rate(%d) exceeds the rate driver supported "
-                        "HNS3_ETHER_MAX_RATE(%d)", ir, HNS3_ETHER_MAX_RATE);
+       if (ir > hw->max_tm_rate) {
+               hns3_err(hw, "rate(%d) exceeds the max rate(%d) driver "
+                        "supported.", ir, hw->max_tm_rate);
                return -EINVAL;
        }
 
@@ -100,7 +100,7 @@ hns3_shaper_para_calc(struct hns3_hw *hw, uint32_t ir, uint8_t shaper_level,
                 * ir_calc gets minimum value when tick is the maximum value.
                 * At the same time, value of ir_u_calc can only be increased up
                 * to eight after the while loop if the value of ir is equal
-                * to HNS3_ETHER_MAX_RATE.
+                * to hw->max_tm_rate.
                 */
                uint32_t numerator;
                do {
@@ -736,7 +736,7 @@ hns3_dcb_info_init(struct hns3_hw *hw)
                hw->dcb_info.pg_dwrr[i] = i ? 0 : BW_MAX_PERCENT;
                hw->dcb_info.pg_info[i].pg_id = i;
                hw->dcb_info.pg_info[i].pg_sch_mode = HNS3_SCH_MODE_DWRR;
-               hw->dcb_info.pg_info[i].bw_limit = HNS3_ETHER_MAX_RATE;
+               hw->dcb_info.pg_info[i].bw_limit = hw->max_tm_rate;
 
                if (i != 0)
                        continue;
@@ -1405,7 +1405,7 @@ hns3_dcb_info_cfg(struct hns3_adapter *hns)
        hw->dcb_info.pg_dwrr[0] = BW_MAX_PERCENT;
        hw->dcb_info.pg_info[0].pg_id = 0;
        hw->dcb_info.pg_info[0].pg_sch_mode = HNS3_SCH_MODE_DWRR;
-       hw->dcb_info.pg_info[0].bw_limit = HNS3_ETHER_MAX_RATE;
+       hw->dcb_info.pg_info[0].bw_limit = hw->max_tm_rate;
        hw->dcb_info.pg_info[0].tc_bit_map = hw->hw_tc_map;
 
        /* Each tc has same bw for valid tc by default */