vdpa/mlx5: support timestamp format

This patch adds support for the timestamp format settings for
the receive and send queues. If the firmware version x.30.1000
or above is installed and the NIC timestamps are configured
with the real-time format, the default zero values for newly
added fields cause the queue creation to fail.

The patch queries the timestamp formats supported by the hardware
and sets the configuration values in queue context accordingly.

Fixes: 95276abaaf0a ("vdpa/mlx5: introduce Mellanox vDPA driver")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c
index 5755a68..898e50f 100644 (file)
--- a/drivers/vdpa/mlx5/mlx5_vdpa.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c
@@ -745,6 +745,7 @@ mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
        priv->caps = attr.vdpa;
        priv->log_max_rqt_size = attr.log_max_rqt_size;
        priv->num_lag_ports = attr.num_lag_ports;
+       priv->qp_ts_format = attr.qp_ts_format;
        if (attr.num_lag_ports == 0)
                priv->num_lag_ports = 1;
        priv->ctx = ctx;

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h
index 98c71aa..d93b430 100644 (file)
--- a/drivers/vdpa/mlx5/mlx5_vdpa.h
+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h
@@ -152,6 +152,7 @@ struct mlx5_vdpa_priv {
        struct mlx5_devx_obj *tiss[16]; /* TIS list for each LAG port. */
        uint16_t nr_virtqs;
        uint8_t num_lag_ports;
+       uint8_t qp_ts_format;
        uint64_t features; /* Negotiated features. */
        uint16_t log_max_rqt_size;
        struct mlx5_vdpa_steer steer;

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_event.c b/drivers/vdpa/mlx5/mlx5_vdpa_event.c
index 86adc86..7cf2c76 100644 (file)
--- a/drivers/vdpa/mlx5/mlx5_vdpa_event.c
+++ b/drivers/vdpa/mlx5/mlx5_vdpa_event.c
@@ -662,6 +662,7 @@ mlx5_vdpa_event_qp_create(struct mlx5_vdpa_priv *priv, uint16_t desc_n,
        if (mlx5_vdpa_cq_create(priv, log_desc_n, callfd, &eqp->cq))
                return -1;
        attr.pd = priv->pdn;
+       attr.ts_format = mlx5_ts_format_conv(priv->qp_ts_format);
        eqp->fw_qp = mlx5_devx_cmd_create_qp(priv->ctx, &attr);
        if (!eqp->fw_qp) {
                DRV_LOG(ERR, "Failed to create FW QP(%u).", rte_errno);
@@ -692,6 +693,7 @@ mlx5_vdpa_event_qp_create(struct mlx5_vdpa_priv *priv, uint16_t desc_n,
        attr.wq_umem_offset = 0;
        attr.dbr_umem_id = eqp->umem_obj->umem_id;
        attr.dbr_address = (1 << log_desc_n) * MLX5_WSEG_SIZE;
+       attr.ts_format = mlx5_ts_format_conv(priv->qp_ts_format);
        eqp->sw_qp = mlx5_devx_cmd_create_qp(priv->ctx, &attr);
        if (!eqp->sw_qp) {
                DRV_LOG(ERR, "Failed to create SW QP(%u).", rte_errno);