net/ice/base: do not wait for PE unit to load
authorQi Zhang <qi.z.zhang@intel.com>
Mon, 6 Jan 2020 03:38:42 +0000 (11:38 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 17 Jan 2020 18:46:01 +0000 (19:46 +0100)
When RDMA is not enabled, when checking for completion of a CORER or
GLOBR do not wait for the PE unit to be loaded (indicated by GLNVM_ULD
register's PE_DONE bit being set) since that does not happen and will
cause issues such as failing to initialize the device.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
drivers/net/ice/base/ice_common.c

index 4ba3ab2..319b00f 100644 (file)
@@ -645,7 +645,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 
        ice_clear_pxe_mode(hw);
 
-
        status = ice_get_caps(hw);
        if (status)
                goto err_unroll_cqinit;
@@ -666,7 +665,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
                goto err_unroll_alloc;
 
        hw->evb_veb = true;
-
        /* Query the allocated resources for Tx scheduler */
        status = ice_sched_query_res_alloc(hw);
        if (status) {
@@ -785,7 +783,7 @@ void ice_deinit_hw(struct ice_hw *hw)
  */
 enum ice_status ice_check_reset(struct ice_hw *hw)
 {
-       u32 cnt, reg = 0, grst_delay;
+       u32 cnt, reg = 0, grst_delay, uld_mask;
 
        /* Poll for Device Active state in case a recent CORER, GLOBR,
         * or EMPR has occurred. The grst delay value is in 100ms units.
@@ -807,13 +805,20 @@ enum ice_status ice_check_reset(struct ice_hw *hw)
                return ICE_ERR_RESET_FAILED;
        }
 
-#define ICE_RESET_DONE_MASK    (GLNVM_ULD_CORER_DONE_M | \
-                                GLNVM_ULD_GLOBR_DONE_M)
+#define ICE_RESET_DONE_MASK    (GLNVM_ULD_PCIER_DONE_M |\
+                                GLNVM_ULD_PCIER_DONE_1_M |\
+                                GLNVM_ULD_CORER_DONE_M |\
+                                GLNVM_ULD_GLOBR_DONE_M |\
+                                GLNVM_ULD_POR_DONE_M |\
+                                GLNVM_ULD_POR_DONE_1_M |\
+                                GLNVM_ULD_PCIER_DONE_2_M)
+
+       uld_mask = ICE_RESET_DONE_MASK;
 
        /* Device is Active; check Global Reset processes are done */
        for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
-               reg = rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK;
-               if (reg == ICE_RESET_DONE_MASK) {
+               reg = rd32(hw, GLNVM_ULD) & uld_mask;
+               if (reg == uld_mask) {
                        ice_debug(hw, ICE_DBG_INIT,
                                  "Global reset processes done. %d\n", cnt);
                        break;