]> git.droids-corp.org - dpdk.git/commitdiff
common/cnxk: support timestamp PKIND in CPT
authorVidya Sagar Velumuri <vvelumuri@marvell.com>
Sun, 8 May 2022 07:48:15 +0000 (13:18 +0530)
committerJerin Jacob <jerinj@marvell.com>
Tue, 10 May 2022 14:26:48 +0000 (16:26 +0200)
Add new API to configure the SA table entries with new CPT PKIND
when timestamp is enabled.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jerin Jacob <jerinj@marvell.com>
drivers/common/cnxk/roc_nix_inl.c
drivers/common/cnxk/roc_nix_inl.h
drivers/common/cnxk/roc_nix_inl_priv.h
drivers/common/cnxk/version.map

index cba1ae93ee2ec8a5feae8ac14dc722aab5cf3a3e..599e2cf3521399034a9475d115e98b45ee9ad271 100644 (file)
@@ -1016,6 +1016,65 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,
        return -ENOTSUP;
 }
 
+int
+roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena, bool inb_inl_dev)
+{
+       struct idev_cfg *idev = idev_get_cfg();
+       struct nix_inl_dev *inl_dev = NULL;
+       void *sa, *sa_base = NULL;
+       struct nix *nix = NULL;
+       uint16_t max_spi = 0;
+       uint8_t pkind = 0;
+       int i;
+
+       if (roc_model_is_cn9k())
+               return 0;
+
+       if (!inb_inl_dev && (roc_nix == NULL))
+               return -EINVAL;
+
+       if (inb_inl_dev) {
+               if ((idev == NULL) || (idev->nix_inl_dev == NULL))
+                       return 0;
+               inl_dev = idev->nix_inl_dev;
+       } else {
+               nix = roc_nix_to_nix_priv(roc_nix);
+               if (!nix->inl_inb_ena)
+                       return 0;
+               sa_base = nix->inb_sa_base;
+               max_spi = roc_nix->ipsec_in_max_spi;
+       }
+
+       if (inl_dev) {
+               if (inl_dev->rq_refs == 0) {
+                       inl_dev->ts_ena = ts_ena;
+                       max_spi = inl_dev->ipsec_in_max_spi;
+                       sa_base = inl_dev->inb_sa_base;
+               } else if (inl_dev->ts_ena != ts_ena) {
+                       if (inl_dev->ts_ena)
+                               plt_err("Inline device is already configured with TS enable");
+                       else
+                               plt_err("Inline device is already configured with TS disable");
+                       return -ENOTSUP;
+               } else {
+                       return 0;
+               }
+       }
+
+       pkind = ts_ena ? ROC_IE_OT_CPT_TS_PKIND : ROC_IE_OT_CPT_PKIND;
+
+       sa = (uint8_t *)sa_base;
+       if (pkind == ((struct roc_ot_ipsec_inb_sa *)sa)->w0.s.pkind)
+               return 0;
+
+       for (i = 0; i < max_spi; i++) {
+               sa = ((uint8_t *)sa_base) +
+                    (i * ROC_NIX_INL_OT_IPSEC_INB_SA_SZ);
+               ((struct roc_ot_ipsec_inb_sa *)sa)->w0.s.pkind = pkind;
+       }
+       return 0;
+}
+
 void
 roc_nix_inl_dev_lock(void)
 {
index 2c2a4d76f2c8930a0d0563b48931e19b8b9e9a64..633f0907999748713cfd7235a6ffb4640f2a8160 100644 (file)
@@ -174,6 +174,8 @@ int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix,
 uint64_t __roc_api roc_nix_inl_dev_rq_limit_get(void);
 int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,
                                        uint16_t max_frags);
+int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,
+                                      bool inb_inl_dev);
 
 /* NIX Inline Outbound API */
 int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);
index 0fa5e090d4cb00ab903d5e590f9da9c91409bda8..f9646a3d5992d78536aafc62ea5bd0f738280a2f 100644 (file)
@@ -76,6 +76,7 @@ struct nix_inl_dev {
        uint32_t inb_spi_mask;
        bool attach_cptlf;
        bool wqe_skip;
+       bool ts_ena;
 };
 
 int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev);
index 2a122e544db2fcae2e141391cd31c3919886613e..53586da55d82f3edf932aadb0caf6364e094db4e 100644 (file)
@@ -159,6 +159,7 @@ INTERNAL {
        roc_nix_inl_outb_is_enabled;
        roc_nix_inl_outb_soft_exp_poll_switch;
        roc_nix_inl_sa_sync;
+       roc_nix_inl_ts_pkind_set;
        roc_nix_inl_ctx_write;
        roc_nix_inl_dev_pffunc_get;
        roc_nix_cpt_ctx_cache_sync;