net/mlx5: add GTP PSC item translation

This patch adds the translation function which
sets the qfi, PDU type.

The next extension header which indicates the following
extension header type is set to 0x85 - a PDU session
container.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index efa3e8b..db0c8b6 100644 (file)
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -98,6 +98,7 @@ Features
 - Hardware LRO.
 - Hairpin.
 - Multiple-thread flow insertion.
+- Matching on GTP extension header with raw encap/decap action.
 
 Limitations
 -----------
@@ -196,6 +197,10 @@ Limitations
      - msg_type
      - teid
 
+- Match on GTP extension header only for GTP PDU session container (next
+  extension header type = 0x85).
+- Match on GTP extension header is not supported in group 0.
+
 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
   The flows within group 0 and set metadata action are rejected by hardware.
 
@@ -1530,6 +1535,11 @@ Supported hardware offloads
    |                       | |  rdma-core 32 | | rdma-core 32  |
    |                       | |  ConnectX-6 Dx| | ConnectX-6 Dx |
    +-----------------------+-----------------+-----------------+
+   | Encapsulation         | |  DPDK 21.02   | | DPDK 21.02    |
+   | GTP PSC               | |  OFED 5.2     | | OFED 5.2      |
+   |                       | |  rdma-core 35 | | rdma-core 35  |
+   |                       | |  ConnectX-6 Dx| | ConnectX-6 Dx |
+   +-----------------------+-----------------+-----------------+
 
 Notes for metadata
 ------------------

diff --git a/doc/guides/rel_notes/release_21_02.rst b/doc/guides/rel_notes/release_21_02.rst
index e72a582..26b7fd6 100644 (file)
--- a/doc/guides/rel_notes/release_21_02.rst
+++ b/doc/guides/rel_notes/release_21_02.rst
@@ -71,6 +71,7 @@ New Features
   Updated the Mellanox mlx5 driver with new features and improvements, including:
 
   * Introduced basic support on Windows.
+  * Added GTP PDU session container matching and raw encap/decap.
 
 * **Updated GSO support.**
 

diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 20d26b2..eb9f97a 100644 (file)
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -357,6 +357,9 @@ enum mlx5_feature_name {
 /* GTP extension header max PDU type value. */
 #define MLX5_GTP_EXT_MAX_PDU_TYPE 15
 
+/* GTP extension header PDU type shift. */
+#define MLX5_GTP_PDU_TYPE_SHIFT(a) ((a) << 4)
+
 /* IPv4 fragment_offset field contains relevant data in bits 2 to 15. */
 #define MLX5_IPV4_FRAG_OFFSET_MASK \
                (RTE_IPV4_HDR_OFFSET_MASK | RTE_IPV4_HDR_MF_FLAG)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index d11f4eb..860ef9a 100644 (file)
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7930,6 +7930,82 @@ flow_dv_translate_item_gtp(void *matcher, void *key,
                 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
 }
 
+/**
+ * Add GTP PSC item to matcher.
+ *
+ * @param[in, out] matcher
+ *   Flow matcher.
+ * @param[in, out] key
+ *   Flow matcher value.
+ * @param[in] item
+ *   Flow pattern to translate.
+ */
+static int
+flow_dv_translate_item_gtp_psc(void *matcher, void *key,
+                              const struct rte_flow_item *item)
+{
+       const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
+       const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
+       void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
+                       misc_parameters_3);
+       void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
+       union {
+               uint32_t w32;
+               struct {
+                       uint16_t seq_num;
+                       uint8_t npdu_num;
+                       uint8_t next_ext_header_type;
+               };
+       } dw_2;
+       uint8_t gtp_flags;
+
+       /* Always set E-flag match on one, regardless of GTP item settings. */
+       gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
+       gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
+       MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
+       gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
+       gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
+       MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
+       /*Set next extension header type. */
+       dw_2.seq_num = 0;
+       dw_2.npdu_num = 0;
+       dw_2.next_ext_header_type = 0xff;
+       MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
+                rte_cpu_to_be_32(dw_2.w32));
+       dw_2.seq_num = 0;
+       dw_2.npdu_num = 0;
+       dw_2.next_ext_header_type = 0x85;
+       MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
+                rte_cpu_to_be_32(dw_2.w32));
+       if (gtp_psc_v) {
+               union {
+                       uint32_t w32;
+                       struct {
+                               uint8_t len;
+                               uint8_t type_flags;
+                               uint8_t qfi;
+                               uint8_t reserved;
+                       };
+               } dw_0;
+
+               /*Set extension header PDU type and Qos. */
+               if (!gtp_psc_m)
+                       gtp_psc_m = &rte_flow_item_gtp_psc_mask;
+               dw_0.w32 = 0;
+               dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
+               dw_0.qfi = gtp_psc_m->qfi;
+               MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
+                        rte_cpu_to_be_32(dw_0.w32));
+               dw_0.w32 = 0;
+               dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
+                                                       gtp_psc_m->pdu_type);
+               dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
+               MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
+                        rte_cpu_to_be_32(dw_0.w32));
+       }
+       return 0;
+}
+
 /**
  * Add eCPRI item to matcher and to the value.
  *
@@ -10615,6 +10691,16 @@ flow_dv_translate(struct rte_eth_dev *dev,
                        matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
                        last_item = MLX5_FLOW_LAYER_GTP;
                        break;
+               case RTE_FLOW_ITEM_TYPE_GTP_PSC:
+                       ret = flow_dv_translate_item_gtp_psc(match_mask,
+                                                         match_value,
+                                                         items);
+                       if (ret)
+                               return rte_flow_error_set(error, -ret,
+                                       RTE_FLOW_ERROR_TYPE_ITEM, NULL,
+                                       "cannot create GTP PSC item");
+                       last_item = MLX5_FLOW_LAYER_GTP_PSC;
+                       break;
                case RTE_FLOW_ITEM_TYPE_ECPRI:
                        if (!mlx5_flex_parser_ecpri_exist(dev)) {
                                /* Create it only the first time to be used. */