ixgbe/base: support X550em_a device
authorWenzhuo Lu <wenzhuo.lu@intel.com>
Sun, 14 Feb 2016 08:54:56 +0000 (16:54 +0800)
committerThomas Monjalon <thomas.monjalon@6wind.com>
Wed, 16 Mar 2016 16:04:49 +0000 (17:04 +0100)
Add new X550EM_a devices and their mac types, X550EM_a
and X550EM_a_vf.
Update the code to use the new devices and mac types.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
doc/guides/rel_notes/release_16_04.rst
drivers/net/ixgbe/base/ixgbe_82599.c
drivers/net/ixgbe/base/ixgbe_api.c
drivers/net/ixgbe/base/ixgbe_common.c
drivers/net/ixgbe/base/ixgbe_dcb.c
drivers/net/ixgbe/base/ixgbe_mbx.c
drivers/net/ixgbe/base/ixgbe_type.h
drivers/net/ixgbe/base/ixgbe_x550.c
drivers/net/ixgbe/base/ixgbe_x550.h

index 36f7e37..9112a56 100644 (file)
@@ -95,6 +95,11 @@ This section should contain new features added in this release. Sample format:
     default VxLAN port number is 4789 but this can be updated
     programmatically.
 
+* **Added new X550EM_a devices.**
+
+  Added new X550EM_a devices and their mac types, X550EM_a and X550EM_a_vf.
+  Updated the code to use the new devices and mac types.
+
 * **Enabled PCI extended tag for i40e.**
 
   It enabled extended tag by checking and writing corresponding PCI config
index 2318190..85114e9 100644 (file)
@@ -1411,7 +1411,8 @@ void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue)
        /* Set drop queue */
        fdirctrl |= (dropqueue << IXGBE_FDIRCTRL_DROP_Q_SHIFT);
        if ((hw->mac.type == ixgbe_mac_X550) ||
-           (hw->mac.type == ixgbe_mac_X550EM_x))
+           (hw->mac.type == ixgbe_mac_X550EM_x) ||
+           (hw->mac.type == ixgbe_mac_X550EM_a))
                fdirctrl |= IXGBE_FDIRCTRL_DROP_NO_MATCH;
 
        IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
@@ -1833,6 +1834,7 @@ s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
                switch (hw->mac.type) {
                case ixgbe_mac_X550:
                case ixgbe_mac_X550EM_x:
+               case ixgbe_mac_X550EM_a:
                        IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm);
                        break;
                default:
index 8ed55e3..18f7cbd 100644 (file)
@@ -52,6 +52,10 @@ static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
        IXGBE_MVALS_INIT(_X550EM_x)
 };
 
+static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
+       IXGBE_MVALS_INIT(_X550EM_a)
+};
+
 /**
  * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
  * @hw: pointer to hardware structure
@@ -102,12 +106,14 @@ s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
                status = ixgbe_init_ops_X550(hw);
                break;
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                status = ixgbe_init_ops_X550EM(hw);
                break;
        case ixgbe_mac_82599_vf:
        case ixgbe_mac_X540_vf:
        case ixgbe_mac_X550_vf:
        case ixgbe_mac_X550EM_x_vf:
+       case ixgbe_mac_X550EM_a_vf:
                status = ixgbe_init_ops_vf(hw);
                break;
        default:
@@ -200,6 +206,18 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
                hw->mac.type = ixgbe_mac_X550EM_x;
                hw->mvals = ixgbe_mvals_X550EM_x;
                break;
+       case IXGBE_DEV_ID_X550EM_A_KR:
+       case IXGBE_DEV_ID_X550EM_A_KR_L:
+       case IXGBE_DEV_ID_X550EM_A_SFP_N:
+       case IXGBE_DEV_ID_X550EM_A_1G_T:
+       case IXGBE_DEV_ID_X550EM_A_1G_T_L:
+       case IXGBE_DEV_ID_X550EM_A_10G_T:
+       case IXGBE_DEV_ID_X550EM_A_QSFP:
+       case IXGBE_DEV_ID_X550EM_A_QSFP_N:
+       case IXGBE_DEV_ID_X550EM_A_SFP:
+               hw->mac.type = ixgbe_mac_X550EM_a;
+               hw->mvals = ixgbe_mvals_X550EM_a;
+               break;
        case IXGBE_DEV_ID_X550_VF:
        case IXGBE_DEV_ID_X550_VF_HV:
                hw->mac.type = ixgbe_mac_X550_vf;
@@ -210,6 +228,11 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
                hw->mac.type = ixgbe_mac_X550EM_x_vf;
                hw->mvals = ixgbe_mvals_X550EM_x;
                break;
+       case IXGBE_DEV_ID_X550EM_A_VF:
+       case IXGBE_DEV_ID_X550EM_A_VF_HV:
+               hw->mac.type = ixgbe_mac_X550EM_a_vf;
+               hw->mvals = ixgbe_mvals_X550EM_a;
+               break;
        default:
                ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
                ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
index 0c060f0..ec61408 100644 (file)
@@ -3570,6 +3570,7 @@ u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;
                max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;
                break;
index 29d7889..9a6a508 100644 (file)
@@ -398,6 +398,7 @@ s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count);
                break;
        default:
@@ -426,6 +427,7 @@ s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count);
                break;
        default:
@@ -465,6 +467,7 @@ s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid,
                                                        tsa, map);
                break;
@@ -504,6 +507,7 @@ s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
                                                             bwgid, tsa);
                break;
@@ -545,6 +549,7 @@ s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max,
                                                             bwgid, tsa,
                                                             map);
@@ -580,6 +585,7 @@ s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
                break;
        default:
@@ -606,6 +612,7 @@ s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw)
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL);
                break;
        default:
@@ -648,6 +655,7 @@ s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ixgbe_dcb_config_82599(hw, dcb_config);
                ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed,
                                                refill, max, bwgid,
@@ -680,6 +688,7 @@ s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map)
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
                break;
        default:
@@ -703,6 +712,7 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,
        case ixgbe_mac_X540:
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
                ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id,
                                                  tsa, map);
                ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id,
index e2d969f..042e5cc 100644 (file)
@@ -617,6 +617,7 @@ STATIC s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
                break;
        case ixgbe_mac_X550:
        case ixgbe_mac_X550EM_x:
+       case ixgbe_mac_X550EM_a:
        case ixgbe_mac_X540:
                vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
                break;
@@ -765,6 +766,7 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
        if (hw->mac.type != ixgbe_mac_82599EB &&
            hw->mac.type != ixgbe_mac_X550 &&
            hw->mac.type != ixgbe_mac_X550EM_x &&
+           hw->mac.type != ixgbe_mac_X550EM_a &&
            hw->mac.type != ixgbe_mac_X540)
                return;
 
index 14896d7..1285cfd 100644 (file)
@@ -129,6 +129,16 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X540T1                    0x1560
 #define IXGBE_DEV_ID_X550T                     0x1563
 #define IXGBE_DEV_ID_X550T1                    0x15D1
+/* Placeholder value, pending official value. */
+#define IXGBE_DEV_ID_X550EM_A_KR               0x15C2
+#define IXGBE_DEV_ID_X550EM_A_KR_L             0x15C3
+#define IXGBE_DEV_ID_X550EM_A_SFP_N            0x15C4
+#define IXGBE_DEV_ID_X550EM_A_1G_T             0x15C6
+#define IXGBE_DEV_ID_X550EM_A_1G_T_L           0x15C7
+#define IXGBE_DEV_ID_X550EM_A_10G_T            0x15C8
+#define IXGBE_DEV_ID_X550EM_A_QSFP             0x15CA
+#define IXGBE_DEV_ID_X550EM_A_QSFP_N           0x15CC
+#define IXGBE_DEV_ID_X550EM_A_SFP              0x15CE
 #define IXGBE_DEV_ID_X550EM_X_KX4              0x15AA
 #define IXGBE_DEV_ID_X550EM_X_KR               0x15AB
 #define IXGBE_DEV_ID_X550EM_X_SFP              0x15AC
@@ -136,6 +146,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X550EM_X_1G_T             0x15AE
 #define IXGBE_DEV_ID_X550_VF_HV                        0x1564
 #define IXGBE_DEV_ID_X550_VF                   0x1565
+#define IXGBE_DEV_ID_X550EM_A_VF               0x15C5
+#define IXGBE_DEV_ID_X550EM_A_VF_HV            0x15B4
 #define IXGBE_DEV_ID_X550EM_X_VF               0x15A8
 #define IXGBE_DEV_ID_X550EM_X_VF_HV            0x15A9
 
@@ -154,6 +166,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_I2CCTL_X540      IXGBE_I2CCTL_82599
 #define IXGBE_I2CCTL_X550      0x15F5C
 #define IXGBE_I2CCTL_X550EM_x  IXGBE_I2CCTL_X550
+#define IXGBE_I2CCTL_X550EM_a  IXGBE_I2CCTL_X550
 #define IXGBE_I2CCTL_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2CCTL)
 #define IXGBE_PHY_GPIO         0x00028
 #define IXGBE_MAC_GPIO         0x00030
@@ -171,7 +184,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_EEC_X540         IXGBE_EEC
 #define IXGBE_EEC_X550         IXGBE_EEC
 #define IXGBE_EEC_X550EM_x     IXGBE_EEC
-#define IXGBE_EEC_BY_MAC(_hw)  IXGBE_EEC
+#define IXGBE_EEC_X550EM_a     0x15FF8
+#define IXGBE_EEC_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), EEC)
 
 #define IXGBE_EERD             0x10014
 #define IXGBE_EEWR             0x10018
@@ -180,7 +194,8 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_FLA_X540         IXGBE_FLA
 #define IXGBE_FLA_X550         IXGBE_FLA
 #define IXGBE_FLA_X550EM_x     IXGBE_FLA
-#define IXGBE_FLA_BY_MAC(_hw)  IXGBE_FLA
+#define IXGBE_FLA_X550EM_a     0x15F6C
+#define IXGBE_FLA_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), FLA)
 
 #define IXGBE_EEMNGCTL 0x10110
 #define IXGBE_EEMNGDATA        0x10114
@@ -193,13 +208,15 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_GRC_X540         IXGBE_GRC
 #define IXGBE_GRC_X550         IXGBE_GRC
 #define IXGBE_GRC_X550EM_x     IXGBE_GRC
-#define IXGBE_GRC_BY_MAC(_hw)  IXGBE_GRC
+#define IXGBE_GRC_X550EM_a     0x15F64
+#define IXGBE_GRC_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), GRC)
 
 #define IXGBE_SRAMREL          0x10210
 #define IXGBE_SRAMREL_X540     IXGBE_SRAMREL
 #define IXGBE_SRAMREL_X550     IXGBE_SRAMREL
 #define IXGBE_SRAMREL_X550EM_x IXGBE_SRAMREL
-#define IXGBE_SRAMREL_BY_MAC(_hw)      IXGBE_SRAMREL
+#define IXGBE_SRAMREL_X550EM_a 0x15F6C
+#define IXGBE_SRAMREL_BY_MAC(_hw)      IXGBE_BY_MAC((_hw), SRAMREL)
 
 #define IXGBE_PHYDBG   0x10218
 
@@ -215,36 +232,42 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_I2C_CLK_IN_X540          IXGBE_I2C_CLK_IN
 #define IXGBE_I2C_CLK_IN_X550          0x00004000
 #define IXGBE_I2C_CLK_IN_X550EM_x      IXGBE_I2C_CLK_IN_X550
+#define IXGBE_I2C_CLK_IN_X550EM_a      IXGBE_I2C_CLK_IN_X550
 #define IXGBE_I2C_CLK_IN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), I2C_CLK_IN)
 
 #define IXGBE_I2C_CLK_OUT              0x00000002
 #define IXGBE_I2C_CLK_OUT_X540         IXGBE_I2C_CLK_OUT
 #define IXGBE_I2C_CLK_OUT_X550         0x00000200
 #define IXGBE_I2C_CLK_OUT_X550EM_x     IXGBE_I2C_CLK_OUT_X550
+#define IXGBE_I2C_CLK_OUT_X550EM_a     IXGBE_I2C_CLK_OUT_X550
 #define IXGBE_I2C_CLK_OUT_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), I2C_CLK_OUT)
 
 #define IXGBE_I2C_DATA_IN              0x00000004
 #define IXGBE_I2C_DATA_IN_X540         IXGBE_I2C_DATA_IN
 #define IXGBE_I2C_DATA_IN_X550         0x00001000
 #define IXGBE_I2C_DATA_IN_X550EM_x     IXGBE_I2C_DATA_IN_X550
+#define IXGBE_I2C_DATA_IN_X550EM_a     IXGBE_I2C_DATA_IN_X550
 #define IXGBE_I2C_DATA_IN_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), I2C_DATA_IN)
 
 #define IXGBE_I2C_DATA_OUT             0x00000008
 #define IXGBE_I2C_DATA_OUT_X540                IXGBE_I2C_DATA_OUT
 #define IXGBE_I2C_DATA_OUT_X550                0x00000400
 #define IXGBE_I2C_DATA_OUT_X550EM_x    IXGBE_I2C_DATA_OUT_X550
+#define IXGBE_I2C_DATA_OUT_X550EM_a    IXGBE_I2C_DATA_OUT_X550
 #define IXGBE_I2C_DATA_OUT_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OUT)
 
 #define IXGBE_I2C_DATA_OE_N_EN         0
 #define IXGBE_I2C_DATA_OE_N_EN_X540    IXGBE_I2C_DATA_OE_N_EN
 #define IXGBE_I2C_DATA_OE_N_EN_X550    0x00000800
 #define IXGBE_I2C_DATA_OE_N_EN_X550EM_x        IXGBE_I2C_DATA_OE_N_EN_X550
+#define IXGBE_I2C_DATA_OE_N_EN_X550EM_a        IXGBE_I2C_DATA_OE_N_EN_X550
 #define IXGBE_I2C_DATA_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OE_N_EN)
 
 #define IXGBE_I2C_BB_EN                        0
 #define IXGBE_I2C_BB_EN_X540           IXGBE_I2C_BB_EN
 #define IXGBE_I2C_BB_EN_X550           0x00000100
 #define IXGBE_I2C_BB_EN_X550EM_x       IXGBE_I2C_BB_EN_X550
+#define IXGBE_I2C_BB_EN_X550EM_a       IXGBE_I2C_BB_EN_X550
 
 #define IXGBE_I2C_BB_EN_BY_MAC(_hw)    IXGBE_BY_MAC((_hw), I2C_BB_EN)
 
@@ -252,6 +275,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_I2C_CLK_OE_N_EN_X540     IXGBE_I2C_CLK_OE_N_EN
 #define IXGBE_I2C_CLK_OE_N_EN_X550     0x00002000
 #define IXGBE_I2C_CLK_OE_N_EN_X550EM_x IXGBE_I2C_CLK_OE_N_EN_X550
+#define IXGBE_I2C_CLK_OE_N_EN_X550EM_a IXGBE_I2C_CLK_OE_N_EN_X550
 #define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN)
 #define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT     500
 
@@ -1064,26 +1088,30 @@ struct ixgbe_dmac_config {
 #define IXGBE_FACTPS_X540      IXGBE_FACTPS
 #define IXGBE_FACTPS_X550      IXGBE_FACTPS
 #define IXGBE_FACTPS_X550EM_x  IXGBE_FACTPS
-#define IXGBE_FACTPS_BY_MAC(_hw)       IXGBE_FACTPS
+#define IXGBE_FACTPS_X550EM_a  0x15FEC
+#define IXGBE_FACTPS_BY_MAC(_hw)       IXGBE_BY_MAC((_hw), FACTPS)
 
 #define IXGBE_PCIEANACTL       0x11040
 #define IXGBE_SWSM             0x10140
 #define IXGBE_SWSM_X540                IXGBE_SWSM
 #define IXGBE_SWSM_X550                IXGBE_SWSM
 #define IXGBE_SWSM_X550EM_x    IXGBE_SWSM
-#define IXGBE_SWSM_BY_MAC(_hw) IXGBE_SWSM
+#define IXGBE_SWSM_X550EM_a    0x15F70
+#define IXGBE_SWSM_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SWSM)
 
 #define IXGBE_FWSM             0x10148
 #define IXGBE_FWSM_X540                IXGBE_FWSM
 #define IXGBE_FWSM_X550                IXGBE_FWSM
 #define IXGBE_FWSM_X550EM_x    IXGBE_FWSM
-#define IXGBE_FWSM_BY_MAC(_hw) IXGBE_FWSM
+#define IXGBE_FWSM_X550EM_a    0x15F74
+#define IXGBE_FWSM_BY_MAC(_hw) IXGBE_BY_MAC((_hw), FWSM)
 
 #define IXGBE_SWFW_SYNC                IXGBE_GSSR
 #define IXGBE_SWFW_SYNC_X540   IXGBE_SWFW_SYNC
 #define IXGBE_SWFW_SYNC_X550   IXGBE_SWFW_SYNC
 #define IXGBE_SWFW_SYNC_X550EM_x       IXGBE_SWFW_SYNC
-#define IXGBE_SWFW_SYNC_BY_MAC(_hw)    IXGBE_SWFW_SYNC
+#define IXGBE_SWFW_SYNC_X550EM_a       0x15F78
+#define IXGBE_SWFW_SYNC_BY_MAC(_hw)    IXGBE_BY_MAC((_hw), SWFW_SYNC)
 
 #define IXGBE_GSSR             0x10160
 #define IXGBE_MREVID           0x11064
@@ -1110,6 +1138,8 @@ struct ixgbe_dmac_config {
 #define IXGBE_CIAD_X550                0x11510
 #define IXGBE_CIAA_X550EM_x    IXGBE_CIAA_X550
 #define IXGBE_CIAD_X550EM_x    IXGBE_CIAD_X550
+#define IXGBE_CIAA_X550EM_a    IXGBE_CIAA_X550
+#define IXGBE_CIAD_X550EM_a    IXGBE_CIAD_X550
 #define IXGBE_CIAA_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAA)
 #define IXGBE_CIAD_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAD)
 #define IXGBE_PICAUSE          0x110B0
@@ -1602,6 +1632,9 @@ struct ixgbe_dmac_config {
 #define IXGBE_SDP0_GPIEN_X550EM_x      IXGBE_SDP0_GPIEN_X540
 #define IXGBE_SDP1_GPIEN_X550EM_x      IXGBE_SDP1_GPIEN_X540
 #define IXGBE_SDP2_GPIEN_X550EM_x      IXGBE_SDP2_GPIEN_X540
+#define IXGBE_SDP0_GPIEN_X550EM_a      IXGBE_SDP0_GPIEN_X540
+#define IXGBE_SDP1_GPIEN_X550EM_a      IXGBE_SDP1_GPIEN_X540
+#define IXGBE_SDP2_GPIEN_X550EM_a      IXGBE_SDP2_GPIEN_X540
 #define IXGBE_SDP0_GPIEN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), SDP0_GPIEN)
 #define IXGBE_SDP1_GPIEN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), SDP1_GPIEN)
 #define IXGBE_SDP2_GPIEN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), SDP2_GPIEN)
@@ -1792,6 +1825,9 @@ enum {
 #define IXGBE_EICR_GPI_SDP0_X550EM_x   IXGBE_EICR_GPI_SDP0_X540
 #define IXGBE_EICR_GPI_SDP1_X550EM_x   IXGBE_EICR_GPI_SDP1_X540
 #define IXGBE_EICR_GPI_SDP2_X550EM_x   IXGBE_EICR_GPI_SDP2_X540
+#define IXGBE_EICR_GPI_SDP0_X550EM_a   IXGBE_EICR_GPI_SDP0_X540
+#define IXGBE_EICR_GPI_SDP1_X550EM_a   IXGBE_EICR_GPI_SDP1_X540
+#define IXGBE_EICR_GPI_SDP2_X550EM_a   IXGBE_EICR_GPI_SDP2_X540
 #define IXGBE_EICR_GPI_SDP0_BY_MAC(_hw)        IXGBE_BY_MAC((_hw), EICR_GPI_SDP0)
 #define IXGBE_EICR_GPI_SDP1_BY_MAC(_hw)        IXGBE_BY_MAC((_hw), EICR_GPI_SDP1)
 #define IXGBE_EICR_GPI_SDP2_BY_MAC(_hw)        IXGBE_BY_MAC((_hw), EICR_GPI_SDP2)
@@ -2167,6 +2203,7 @@ enum {
 #define IXGBE_GSSR_FLASH_SM            0x0010
 #define IXGBE_GSSR_NVM_UPDATE_SM       0x0200
 #define IXGBE_GSSR_SW_MNG_SM           0x0400
+#define IXGBE_GSSR_TOKEN_SM    0x40000000 /* SW bit for shared access */
 #define IXGBE_GSSR_SHARED_I2C_SM 0x1806 /* Wait for both phys and both I2Cs */
 #define IXGBE_GSSR_I2C_MASK    0x1800
 #define IXGBE_GSSR_NVM_PHY_MASK        0xF
@@ -3201,7 +3238,8 @@ struct ixgbe_adv_tx_context_desc {
 #define IXGBE_ADVTXD_TUNNEL_TYPE_SHIFT 16 /* Adv Tx Desc Tunnel Type shift */
 #define IXGBE_ADVTXD_OUTERIPCS_SHIFT   17 /* Adv Tx Desc OUTERIPCS Shift */
 #define IXGBE_ADVTXD_TUNNEL_TYPE_NVGRE 1  /* Adv Tx Desc Tunnel Type NVGRE */
-
+/* Adv Tx Desc OUTERIPCS Shift for X550EM_a */
+#define IXGBE_ADVTXD_OUTERIPCS_SHIFT_X550EM_a  26
 /* Autonegotiation advertised speeds */
 typedef u32 ixgbe_autoneg_advertised;
 /* Link speed */
@@ -3440,8 +3478,10 @@ enum ixgbe_mac_type {
        ixgbe_mac_X540_vf,
        ixgbe_mac_X550,
        ixgbe_mac_X550EM_x,
+       ixgbe_mac_X550EM_a,
        ixgbe_mac_X550_vf,
        ixgbe_mac_X550EM_x_vf,
+       ixgbe_mac_X550EM_a_vf,
        ixgbe_num_macs
 };
 
index 4ca7998..1571b14 100644 (file)
@@ -80,9 +80,14 @@ s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw)
        mac->ops.mdd_event = ixgbe_mdd_event_X550;
        mac->ops.restore_mdd_vf = ixgbe_restore_mdd_vf_X550;
        mac->ops.disable_rx = ixgbe_disable_rx_x550;
-       if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+       switch (hw->device_id) {
+       case IXGBE_DEV_ID_X550EM_X_10G_T:
+       case IXGBE_DEV_ID_X550EM_A_10G_T:
                hw->mac.ops.led_on = ixgbe_led_on_t_X550em;
                hw->mac.ops.led_off = ixgbe_led_off_t_X550em;
+               break;
+       default:
+               break;
        }
        return ret_val;
 }
@@ -330,22 +335,36 @@ STATIC void ixgbe_setup_mux_ctl(struct ixgbe_hw *hw)
 STATIC s32 ixgbe_identify_phy_x550em(struct ixgbe_hw *hw)
 {
        switch (hw->device_id) {
+       case IXGBE_DEV_ID_X550EM_A_SFP:
+               hw->phy.phy_semaphore_mask = IXGBE_GSSR_TOKEN_SM;
+               if (hw->bus.lan_id)
+                       hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
+               else
+                       hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;
+               return ixgbe_identify_module_generic(hw);
        case IXGBE_DEV_ID_X550EM_X_SFP:
                /* set up for CS4227 usage */
                hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
                ixgbe_setup_mux_ctl(hw);
                ixgbe_check_cs4227(hw);
+               /* Fallthrough */
 
+       case IXGBE_DEV_ID_X550EM_A_SFP_N:
                return ixgbe_identify_module_generic(hw);
                break;
        case IXGBE_DEV_ID_X550EM_X_KX4:
                hw->phy.type = ixgbe_phy_x550em_kx4;
                break;
        case IXGBE_DEV_ID_X550EM_X_KR:
+       case IXGBE_DEV_ID_X550EM_A_KR:
+       case IXGBE_DEV_ID_X550EM_A_KR_L:
                hw->phy.type = ixgbe_phy_x550em_kr;
                break;
        case IXGBE_DEV_ID_X550EM_X_1G_T:
        case IXGBE_DEV_ID_X550EM_X_10G_T:
+       case IXGBE_DEV_ID_X550EM_A_1G_T:
+       case IXGBE_DEV_ID_X550EM_A_1G_T_L:
+       case IXGBE_DEV_ID_X550EM_A_10G_T:
                return ixgbe_identify_phy_generic(hw);
        default:
                break;
@@ -420,6 +439,10 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
                mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550em;
                mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550em;
        }
+       if (hw->mac.type == ixgbe_mac_X550EM_a) {
+               mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550a;
+               mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550a;
+       }
 
        mac->ops.get_media_type = ixgbe_get_media_type_X550em;
        mac->ops.setup_sfp = ixgbe_setup_sfp_modules_X550em;
@@ -897,6 +920,69 @@ out:
        return ret;
 }
 
+/**
+ *  ixgbe_write_iosf_sb_reg_x550a - Writes a value to specified register
+ *  of the IOSF device
+ *  @hw: pointer to hardware structure
+ *  @reg_addr: 32 bit PHY register to write
+ *  @device_type: 3 bit device type
+ *  @data: Data to write to the register
+ **/
+s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
+       u32 device_type, u32 data)
+{
+       struct ixgbe_hic_internal_phy_req write_cmd;
+       s32 status;
+       UNREFERENCED_1PARAMETER(device_type);
+
+       write_cmd.hdr.cmd = FW_INT_PHY_REQ_CMD;
+       write_cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN;
+       write_cmd.port_number = hw->bus.lan_id;
+       write_cmd.command_type = FW_INT_PHY_REQ_WRITE;
+       write_cmd.address = (u16)reg_addr;
+       write_cmd.rsv1 = 0;
+       write_cmd.write_data = data;
+       write_cmd.pad = 0;
+
+       status = ixgbe_host_interface_command(hw, (u32 *)&write_cmd,
+               sizeof(write_cmd), IXGBE_HI_COMMAND_TIMEOUT, false);
+
+       return status;
+}
+
+/**
+ *  ixgbe_read_iosf_sb_reg_x550a - Writes a value to specified register
+ *  of the IOSF device.
+ *  @hw: pointer to hardware structure
+ *  @reg_addr: 32 bit PHY register to write
+ *  @device_type: 3 bit device type
+ *  @data: Pointer to read data from the register
+ **/
+s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
+       u32 device_type, u32 *data)
+{
+       struct ixgbe_hic_internal_phy_req read_cmd;
+       s32 status;
+       UNREFERENCED_1PARAMETER(device_type);
+
+       read_cmd.hdr.cmd = FW_INT_PHY_REQ_CMD;
+       read_cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN;
+       read_cmd.port_number = hw->bus.lan_id;
+       read_cmd.command_type = FW_INT_PHY_REQ_READ;
+       read_cmd.address = (u16)reg_addr;
+       read_cmd.rsv1 = 0;
+       read_cmd.write_data = 0;
+       read_cmd.pad = 0;
+
+       status = ixgbe_host_interface_command(hw, (u32 *)&read_cmd,
+               sizeof(read_cmd), IXGBE_HI_COMMAND_TIMEOUT, true);
+
+       /* Extract the register value from the response. */
+       *data = ((struct ixgbe_hic_internal_phy_resp *)&read_cmd)->read_data;
+
+       return status;
+}
+
 /**
  *  ixgbe_disable_mdd_X550
  *  @hw: pointer to hardware structure
@@ -1056,13 +1142,22 @@ enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
        switch (hw->device_id) {
        case IXGBE_DEV_ID_X550EM_X_KR:
        case IXGBE_DEV_ID_X550EM_X_KX4:
+       case IXGBE_DEV_ID_X550EM_A_KR:
+       case IXGBE_DEV_ID_X550EM_A_KR_L:
                media_type = ixgbe_media_type_backplane;
                break;
        case IXGBE_DEV_ID_X550EM_X_SFP:
+       case IXGBE_DEV_ID_X550EM_A_SFP:
+       case IXGBE_DEV_ID_X550EM_A_SFP_N:
+       case IXGBE_DEV_ID_X550EM_A_QSFP:
+       case IXGBE_DEV_ID_X550EM_A_QSFP_N:
                media_type = ixgbe_media_type_fiber;
                break;
        case IXGBE_DEV_ID_X550EM_X_1G_T:
        case IXGBE_DEV_ID_X550EM_X_10G_T:
+       case IXGBE_DEV_ID_X550EM_A_1G_T:
+       case IXGBE_DEV_ID_X550EM_A_1G_T_L:
+       case IXGBE_DEV_ID_X550EM_A_10G_T:
                media_type = ixgbe_media_type_copper;
                break;
        default:
index a436686..47efa7c 100644 (file)
@@ -69,6 +69,10 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
                                 u32 device_type, u32 data);
 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
        u32 device_type, u32 *data);
+s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
+       u32 device_type, u32 data);
+s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
+       u32 device_type, u32 *data);
 void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw);
 void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw);
 void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);