common/sfc_efx/base: replace PCI efsys macros with functions

efsys macros that manipulate PCI devices cannot be defined in
common sfc_efx DPDK driver since in DPDK build the bus drivers
that provide required functionality are built after common drivers.

Replace the macros with function callbacks to remove that build
dependency. Drivers now should pass the callbacks directly to
efx function instead of defining implementation in efsys.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>

diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h
index 4a0a1231dc5ef78ee52daf474230f7b1ff98f4b7..7e747e6122b825eb1afd742678c558efd0514093 100644 (file)
--- a/drivers/common/sfc_efx/base/efx.h
+++ b/drivers/common/sfc_efx/base/efx.h
@@ -82,6 +82,34 @@ efx_family(
 
 #if EFSYS_OPT_PCI
 
+typedef struct efx_pci_ops_s {
+       /*
+        * Function for reading PCIe configuration space.
+        *
+        * espcp        System-specific PCIe device handle;
+        * offset       Offset inside PCIe configuration space to start reading
+        *              from;
+        * edp          EFX DWORD structure that should be populated by function
+        *              in little-endian order;
+        *
+        * Returns status code, 0 on success, any other value on error.
+        */
+       efx_rc_t        (*epo_config_readd)(efsys_pci_config_t *espcp,
+                                           uint32_t offset, efx_dword_t *edp);
+       /*
+        * Function for finding PCIe memory bar handle by its index from a PCIe
+        * device handle. The found memory bar is available in read-only mode.
+        *
+        * configp      System-specific PCIe device handle;
+        * index        Memory bar index;
+        * memp         Pointer to the found memory bar handle;
+        *
+        * Returns status code, 0 on success, any other value on error.
+        */
+       efx_rc_t        (*epo_find_mem_bar)(efsys_pci_config_t *configp,
+                                           int index, efsys_bar_t *memp);
+} efx_pci_ops_t;
+
 /* Determine EFX family and perform lookup of the function control window
  *
  * The function requires PCI config handle from which all memory bars can
@@ -95,6 +123,7 @@ efx_family_probe_bar(
        __in            uint16_t venid,
        __in            uint16_t devid,
        __in            efsys_pci_config_t *espcp,
+       __in            const efx_pci_ops_t *epop,
        __out           efx_family_t *efp,
        __out           efx_bar_region_t *ebrp);
 

diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h
index be3f3f6bf5c188ab664d0b27217f2f38331739bd..f58586bee09700558e16fa0b7909854934ebcfed 100644 (file)
--- a/drivers/common/sfc_efx/base/efx_impl.h
+++ b/drivers/common/sfc_efx/base/efx_impl.h
@@ -1588,6 +1588,7 @@ LIBEFX_INTERNAL
 extern __checkReturn                   efx_rc_t
 efx_pci_config_find_next_ext_cap(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __in                            uint16_t cap_id,
        __inout                         size_t *offsetp);
 
@@ -1602,6 +1603,7 @@ LIBEFX_INTERNAL
 extern __checkReturn                   efx_rc_t
 efx_pci_config_next_ext_cap(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __inout                         size_t *offsetp);
 
 /*
@@ -1614,6 +1616,7 @@ LIBEFX_INTERNAL
 extern __checkReturn                   efx_rc_t
 efx_pci_find_next_xilinx_cap_table(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __inout                         size_t *pci_cap_offsetp,
        __out                           unsigned int *xilinx_tbl_barp,
        __out                           efsys_dma_addr_t *xilinx_tbl_offsetp);
@@ -1629,6 +1632,7 @@ LIBEFX_INTERNAL
 extern __checkReturn                   efx_rc_t
 efx_pci_read_ext_cap_xilinx_table(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __in                            size_t cap_offset,
        __out                           unsigned int *barp,
        __out                           efsys_dma_addr_t *offsetp);

diff --git a/drivers/common/sfc_efx/base/efx_nic.c b/drivers/common/sfc_efx/base/efx_nic.c
index dcf0987ebf1317b6bf5c1e2df91b8de3a1347dd9..a78c4c3737dde69f58407ffeb996846cdd8aeddb 100644 (file)
--- a/drivers/common/sfc_efx/base/efx_nic.c
+++ b/drivers/common/sfc_efx/base/efx_nic.c
@@ -110,6 +110,7 @@ efx_family_probe_bar(
        __in            uint16_t venid,
        __in            uint16_t devid,
        __in            efsys_pci_config_t *espcp,
+       __in            const efx_pci_ops_t *epop,
        __out           efx_family_t *efp,
        __out           efx_bar_region_t *ebrp)
 {
@@ -121,7 +122,7 @@ efx_family_probe_bar(
 #if EFSYS_OPT_RIVERHEAD
                case EFX_PCI_DEVID_RIVERHEAD:
                case EFX_PCI_DEVID_RIVERHEAD_VF:
-                       rc = rhead_pci_nic_membar_lookup(espcp, ebrp);
+                       rc = rhead_pci_nic_membar_lookup(espcp, epop, ebrp);
                        if (rc == 0)
                                *efp = EFX_FAMILY_RIVERHEAD;
 

diff --git a/drivers/common/sfc_efx/base/efx_pci.c b/drivers/common/sfc_efx/base/efx_pci.c
index bdf995cf84552d4c934e946743c3eaac169d0503..1e7307476f17a3f3a250cfff38abf384229bbbd5 100644 (file)
--- a/drivers/common/sfc_efx/base/efx_pci.c
+++ b/drivers/common/sfc_efx/base/efx_pci.c
@@ -12,6 +12,7 @@
        __checkReturn                   efx_rc_t
 efx_pci_config_next_ext_cap(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __inout                         size_t *offsetp)
 {
        efx_dword_t hdr;
@@ -26,9 +27,9 @@ efx_pci_config_next_ext_cap(
        if (*offsetp == 0) {
                *offsetp = ESE_GZ_PCI_BASE_CONFIG_SPACE_SIZE;
        } else {
-               EFSYS_PCI_CONFIG_READD(espcp, *offsetp +
+               rc = epop->epo_config_readd(espcp, *offsetp +
                                (EFX_LOW_BIT(ESF_GZ_PCI_EXPRESS_XCAP_ID) / 8),
-                               &hdr, &rc);
+                               &hdr);
                if (rc != 0) {
                        rc = EIO;
                        goto fail2;
@@ -58,6 +59,7 @@ fail1:
        __checkReturn                   efx_rc_t
 efx_pci_config_find_next_ext_cap(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __in                            uint16_t cap_id,
        __inout                         size_t *offsetp)
 {
@@ -73,7 +75,7 @@ efx_pci_config_find_next_ext_cap(
        position = *offsetp;
 
        while (1) {
-               rc = efx_pci_config_next_ext_cap(espcp, &position);
+               rc = efx_pci_config_next_ext_cap(espcp, epop, &position);
                if (rc != 0) {
                        if (rc == ENOENT)
                                break;
@@ -81,9 +83,9 @@ efx_pci_config_find_next_ext_cap(
                                goto fail2;
                }
 
-               EFSYS_PCI_CONFIG_READD(espcp, position +
+               rc = epop->epo_config_readd(espcp, position +
                                (EFX_LOW_BIT(ESF_GZ_PCI_EXPRESS_XCAP_ID) / 8),
-                               &hdr, &rc);
+                               &hdr);
                if (rc != 0) {
                        rc = EIO;
                        goto fail3;
@@ -116,6 +118,7 @@ fail1:
        __checkReturn                   efx_rc_t
 efx_pci_find_next_xilinx_cap_table(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __inout                         size_t *pci_cap_offsetp,
        __out                           unsigned int *xilinx_tbl_barp,
        __out                           efsys_dma_addr_t *xilinx_tbl_offsetp)
@@ -134,7 +137,7 @@ efx_pci_find_next_xilinx_cap_table(
                unsigned int tbl_bar;
                efsys_dma_addr_t tbl_offset;
 
-               rc = efx_pci_config_find_next_ext_cap(espcp,
+               rc = efx_pci_config_find_next_ext_cap(espcp, epop,
                                ESE_GZ_PCI_EXPRESS_XCAP_ID_VNDR, &cap_offset);
                if (rc != 0) {
                        if (rc == ENOENT)
@@ -149,7 +152,7 @@ efx_pci_find_next_xilinx_cap_table(
                 * locator. Try to read it and skip it if the capability is
                 * not the locator.
                 */
-               rc = efx_pci_read_ext_cap_xilinx_table(espcp, cap_offset,
+               rc = efx_pci_read_ext_cap_xilinx_table(espcp, epop, cap_offset,
                                                       &tbl_bar, &tbl_offset);
                if (rc == 0) {
                        *xilinx_tbl_barp = tbl_bar;
@@ -183,6 +186,7 @@ fail1:
        __checkReturn                   efx_rc_t
 efx_pci_read_ext_cap_xilinx_table(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __in                            size_t cap_offset,
        __out                           unsigned int *barp,
        __out                           efsys_dma_addr_t *offsetp)
@@ -199,9 +203,9 @@ efx_pci_read_ext_cap_xilinx_table(
        efsys_dma_addr_t offset;
        efx_rc_t rc;
 
-       EFSYS_PCI_CONFIG_READD(espcp, cap_offset +
+       rc = epop->epo_config_readd(espcp, cap_offset +
                               (EFX_LOW_BIT(ESF_GZ_PCI_EXPRESS_XCAP_ID) / 8),
-                              &cap_hdr, &rc);
+                              &cap_hdr);
        if (rc != 0) {
                rc = EIO;
                goto fail1;
@@ -213,9 +217,9 @@ efx_pci_read_ext_cap_xilinx_table(
                goto fail2;
        }
 
-       EFSYS_PCI_CONFIG_READD(espcp, vsec_offset +
+       rc = epop->epo_config_readd(espcp, vsec_offset +
                               (EFX_LOW_BIT(ESF_GZ_VSEC_ID) / 8),
-                              &vsec.eo_dword[0], &rc);
+                              &vsec.eo_dword[0]);
        if (rc != 0) {
                rc = EIO;
                goto fail3;
@@ -240,9 +244,9 @@ efx_pci_read_ext_cap_xilinx_table(
                goto fail5;
        }
 
-       EFSYS_PCI_CONFIG_READD(espcp, vsec_offset +
+       rc = epop->epo_config_readd(espcp, vsec_offset +
                               (EFX_LOW_BIT(ESF_GZ_VSEC_TBL_BAR) / 8),
-                              &vsec.eo_dword[1], &rc);
+                              &vsec.eo_dword[1]);
        if (rc != 0) {
                rc = EIO;
                goto fail6;
@@ -252,9 +256,9 @@ efx_pci_read_ext_cap_xilinx_table(
        offset_low = EFX_OWORD_FIELD32(vsec, ESF_GZ_VSEC_TBL_OFF_LO);
 
        if (vsec_len >= ESE_GZ_VSEC_LEN_HIGH_OFFT) {
-               EFSYS_PCI_CONFIG_READD(espcp, vsec_offset +
+               rc = epop->epo_config_readd(espcp, vsec_offset +
                                (EFX_LOW_BIT(ESF_GZ_VSEC_TBL_OFF_HI) / 8),
-                               &vsec.eo_dword[2], &rc);
+                               &vsec.eo_dword[2]);
                if (rc != 0) {
                        rc = EIO;
                        goto fail7;

diff --git a/drivers/common/sfc_efx/base/rhead_impl.h b/drivers/common/sfc_efx/base/rhead_impl.h
index 4d5307d18b1db366f84cc2cc6745cbd19ba80d4b..3383c47ec6d8c03f3f045f0001bf9977225842c4 100644 (file)
--- a/drivers/common/sfc_efx/base/rhead_impl.h
+++ b/drivers/common/sfc_efx/base/rhead_impl.h
@@ -461,6 +461,7 @@ LIBEFX_INTERNAL
 extern __checkReturn                   efx_rc_t
 rhead_pci_nic_membar_lookup(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __out                           efx_bar_region_t *ebrp);
 
 #endif /* EFSYS_OPT_PCI */

diff --git a/drivers/common/sfc_efx/base/rhead_pci.c b/drivers/common/sfc_efx/base/rhead_pci.c
index dfb163b96de614ff128fadb3f514850cd938c3cb..0f4b4cb910e71887476bde890152fb6513cee7ad 100644 (file)
--- a/drivers/common/sfc_efx/base/rhead_pci.c
+++ b/drivers/common/sfc_efx/base/rhead_pci.c
@@ -47,6 +47,7 @@ fail1:
        __checkReturn                   efx_rc_t
 rhead_pci_nic_membar_lookup(
        __in                            efsys_pci_config_t *espcp,
+       __in                            const efx_pci_ops_t *epop,
        __out                           efx_bar_region_t *ebrp)
 {
        boolean_t xilinx_tbl_found = B_FALSE;
@@ -65,7 +66,8 @@ rhead_pci_nic_membar_lookup(
         * the following discovery steps.
         */
        while (1) {
-               rc = efx_pci_find_next_xilinx_cap_table(espcp, &pci_capa_offset,
+               rc = efx_pci_find_next_xilinx_cap_table(espcp, epop,
+                                                       &pci_capa_offset,
                                                        &xilinx_tbl_bar,
                                                        &xilinx_tbl_offset);
                if (rc != 0) {
@@ -90,7 +92,7 @@ rhead_pci_nic_membar_lookup(
 
                xilinx_tbl_found = B_TRUE;
 
-               EFSYS_PCI_FIND_MEM_BAR(espcp, xilinx_tbl_bar, &xil_eb, &rc);
+               rc = epop->epo_find_mem_bar(espcp, xilinx_tbl_bar, &xil_eb);
                if (rc != 0)
                        goto fail2;
 
@@ -110,7 +112,7 @@ rhead_pci_nic_membar_lookup(
        if (bar_found == B_FALSE)
                goto fail4;
 
-       EFSYS_PCI_FIND_MEM_BAR(espcp, ebrp->ebr_index, &nic_eb, &rc);
+       rc = epop->epo_find_mem_bar(espcp, ebrp->ebr_index, &nic_eb);
        if (rc != 0)
                goto fail5;