net/ice/base: support add HW profile for RSS raw flow

Based on the parser library, we can directly set HW profile and
associate VSI for RSS raw flows. Add symmetric hash configuration
for raw flow.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index f699dbbc745d375448dd634e3ac6d334e0643808..da27d157c0266d462853ada53ac9466764304093 100644 (file)
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -4071,6 +4071,115 @@ ice_rss_update_symm(struct ice_hw *hw,
        }
 }
 
+/**
+ * ice_rss_cfg_raw_symm - configure symmetric hash parameters
+ * for raw pattern
+ * @hw: pointer to the hardware structure
+ * @prof: pointer to parser profile
+ * @prof_id: profile ID
+ *
+ * Calculate symmetric hash parameters based on input protocol type.
+ */
+static void
+ice_rss_cfg_raw_symm(struct ice_hw *hw,
+                    struct ice_parser_profile *prof, u64 prof_id)
+{
+       u8 src_idx, dst_idx, proto_id;
+       int len, i = 0;
+
+       while (i < prof->fv_num) {
+               proto_id = prof->fv[i].proto_id;
+
+               switch (proto_id) {
+               case ICE_PROT_IPV4_OF_OR_S:
+                       len = ICE_FLOW_FLD_SZ_IPV4_ADDR /
+                             ICE_FLOW_FV_EXTRACT_SZ;
+                       if (prof->fv[i].offset ==
+                           ICE_FLOW_FIELD_IPV4_SRC_OFFSET &&
+                           prof->fv[i + len].proto_id == proto_id &&
+                           prof->fv[i + len].offset ==
+                           ICE_FLOW_FIELD_IPV4_DST_OFFSET) {
+                               src_idx = i;
+                               dst_idx = i + len;
+                               i += 2 * len;
+                               break;
+                       }
+                       i++;
+                       continue;
+               case ICE_PROT_IPV6_OF_OR_S:
+                       len = ICE_FLOW_FLD_SZ_IPV6_ADDR /
+                             ICE_FLOW_FV_EXTRACT_SZ;
+                       if (prof->fv[i].offset ==
+                           ICE_FLOW_FIELD_IPV6_SRC_OFFSET &&
+                           prof->fv[i + len].proto_id == proto_id &&
+                           prof->fv[i + len].offset ==
+                           ICE_FLOW_FIELD_IPV6_DST_OFFSET) {
+                               src_idx = i;
+                               dst_idx = i + len;
+                               i += 2 * len;
+                               break;
+                       }
+                       i++;
+                       continue;
+               case ICE_PROT_TCP_IL:
+               case ICE_PROT_UDP_IL_OR_S:
+               case ICE_PROT_SCTP_IL:
+                       len = ICE_FLOW_FLD_SZ_PORT /
+                             ICE_FLOW_FV_EXTRACT_SZ;
+                       if (prof->fv[i].offset ==
+                           ICE_FLOW_FIELD_SRC_PORT_OFFSET &&
+                           prof->fv[i + len].proto_id == proto_id &&
+                           prof->fv[i + len].offset ==
+                           ICE_FLOW_FIELD_DST_PORT_OFFSET) {
+                               src_idx = i;
+                               dst_idx = i + len;
+                               i += 2 * len;
+                               break;
+                       }
+                       i++;
+                       continue;
+               default:
+                       i++;
+                       continue;
+               }
+               ice_rss_config_xor(hw, prof_id, src_idx, dst_idx, len);
+       }
+}
+
+/* Max registers index per packet profile */
+#define ICE_SYMM_REG_INDEX_MAX 6
+
+/**
+ * ice_rss_update_raw_symm - update symmetric hash configuration
+ * for raw pattern
+ * @hw: pointer to the hardware structure
+ * @cfg: configure parameters for raw pattern
+ * @id: profile tracking ID
+ *
+ * Update symmetric hash configuration for raw pattern if required.
+ * Otherwise only clear to default.
+ */
+void
+ice_rss_update_raw_symm(struct ice_hw *hw,
+                       struct ice_rss_raw_cfg *cfg, u64 id)
+{
+       struct ice_prof_map *map;
+       u8 prof_id, m;
+
+       ice_acquire_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock);
+       map = ice_search_prof_id(hw, ICE_BLK_RSS, id);
+       if (map)
+               prof_id = map->prof_id;
+       ice_release_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock);
+       if (!map)
+               return;
+       /* clear to default */
+       for (m = 0; m < ICE_SYMM_REG_INDEX_MAX; m++)
+               wr32(hw, GLQF_HSYMM(prof_id, m), 0);
+       if (cfg->symm)
+               ice_rss_cfg_raw_symm(hw, &cfg->prof, prof_id);
+}
+
 /**
  * ice_add_rss_cfg_sync - add an RSS configuration
  * @hw: pointer to the hardware structure

diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index dea7b3c0e882ac303b0b2e8e238409024381b27d..f941ce4333d704d1a6c5ef76b2dfdbbb42a05105 100644 (file)
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -149,6 +149,13 @@
 #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \
        (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI)
 
+#define ICE_FLOW_FIELD_IPV4_SRC_OFFSET 12
+#define ICE_FLOW_FIELD_IPV4_DST_OFFSET 16
+#define ICE_FLOW_FIELD_IPV6_SRC_OFFSET 8
+#define ICE_FLOW_FIELD_IPV6_DST_OFFSET 24
+#define ICE_FLOW_FIELD_SRC_PORT_OFFSET 0
+#define ICE_FLOW_FIELD_DST_PORT_OFFSET 2
+
 /* Protocol header fields within a packet segment. A segment consists of one or
  * more protocol headers that make up a logical group of protocol headers. Each
  * logical group of protocol headers encapsulates or is encapsulated using/by
@@ -493,11 +500,18 @@ struct ice_flow_prof {
        struct ice_flow_action *acts;
 };
 
+struct ice_rss_raw_cfg {
+       struct ice_parser_profile prof;
+       bool raw_ena;
+       bool symm;
+};
+
 struct ice_rss_cfg {
        struct LIST_ENTRY_TYPE l_entry;
        /* bitmap of VSIs added to the RSS entry */
        ice_declare_bitmap(vsis, ICE_MAX_VSI);
        struct ice_rss_hash_cfg hash;
+       struct ice_rss_raw_cfg raw;
 };
 
 enum ice_flow_action_type {
@@ -585,5 +599,7 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
 enum ice_status
 ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
                const struct ice_rss_hash_cfg *cfg);
+void ice_rss_update_raw_symm(struct ice_hw *hw,
+                            struct ice_rss_raw_cfg *cfg, u64 id);
 u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
 #endif /* _ICE_FLOW_H_ */