event/cnxk: fix max timer chunk pool cache size
authorShijith Thotton <sthotton@marvell.com>
Mon, 30 Aug 2021 16:14:46 +0000 (21:44 +0530)
committerJerin Jacob <jerinj@marvell.com>
Thu, 21 Oct 2021 08:14:50 +0000 (10:14 +0200)
Reduced max chunk pool cache size from RTE_MEMPOOL_CACHE_MAX_SIZE(512)
to 128.

If chunk pool cache is empty, it gets filled during arm. Filling 512
entries at a time will fail arm if timeout is shorter, hence
reduce the pool cache size.

Fixes: 0e792433d051 ("event/cnxk: create and free timer adapter")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
drivers/event/cnxk/cnxk_tim_evdev.c
drivers/event/cnxk/cnxk_tim_evdev.h

index d325dae..3dd93ae 100644 (file)
@@ -27,8 +27,8 @@ cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring,
        snprintf(pool_name, sizeof(pool_name), "cnxk_tim_chunk_pool%d",
                 tim_ring->ring_id);
 
-       if (cache_sz > RTE_MEMPOOL_CACHE_MAX_SIZE)
-               cache_sz = RTE_MEMPOOL_CACHE_MAX_SIZE;
+       if (cache_sz > CNXK_TIM_MAX_POOL_CACHE_SZ)
+               cache_sz = CNXK_TIM_MAX_POOL_CACHE_SZ;
        cache_sz = cache_sz != 0 ? cache_sz : 2;
        tim_ring->nb_chunks += (cache_sz * rte_lcore_count());
        if (!tim_ring->disable_npa) {
index 8e25cef..9a23952 100644 (file)
@@ -31,6 +31,7 @@
 #define CNXK_TIM_NB_CHUNK_SLOTS(sz) (((sz) / CNXK_TIM_CHUNK_ALIGNMENT) - 1)
 #define CNXK_TIM_MIN_CHUNK_SLOTS    (0x1)
 #define CNXK_TIM_MAX_CHUNK_SLOTS    (0x1FFE)
+#define CNXK_TIM_MAX_POOL_CACHE_SZ  (128)
 
 #define CN9K_TIM_MIN_TMO_TKS (256)