net/mlx5: make vectorized Tx threshold configurable

Add txqs_max_vec parameter to configure the maximum number of Tx queues to
enable vectorized Tx. And its default value is set according to the
architecture and device type.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 1dc3282..7379cf3 100644 (file)
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -338,6 +338,20 @@ Run-time configuration
 
         - Set to 8 by default.
 
+- ``txqs_max_vec`` parameter [int]
+
+  Enable vectorized Tx only when the number of TX queues is less than or
+  equal to this value. Effective only when ``tx_vec_en`` is enabled.
+
+  On ConnectX-5:
+
+        - Set to 8 by default on ARMv8.
+        - Set to 4 by default otherwise.
+
+  On Bluefield
+
+        - Set to 16 by default.
+
 - ``txq_mpw_en`` parameter [int]
 
   A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
@@ -383,7 +397,7 @@ Run-time configuration
 - ``tx_vec_en`` parameter [int]
 
   A nonzero value enables Tx vector on ConnectX-5 and Bluefield NICs if the number of
-  global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
+  global Tx queues on the port is less than ``txqs_max_vec``.
 
   This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
   DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 629f03d..62ac54f 100644 (file)
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -75,6 +75,12 @@
  */
 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
 
+/*
+ * Device parameter to configure the number of TX queues threshold for
+ * enabling vectorized Tx.
+ */
+#define MLX5_TXQS_MAX_VEC "txqs_max_vec"
+
 /* Device parameter to enable multi-packet send WQEs. */
 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
 
@@ -496,6 +502,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
                config->txq_inline = tmp;
        } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
                config->txqs_inline = tmp;
+       } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
+               config->txqs_vec = tmp;
        } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
                config->mps = !!tmp;
        } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
@@ -543,6 +551,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
                MLX5_RXQS_MIN_MPRQ,
                MLX5_TXQ_INLINE,
                MLX5_TXQS_MIN_INLINE,
+               MLX5_TXQS_MAX_VEC,
                MLX5_TXQ_MPW_EN,
                MLX5_TXQ_MPW_HDR_DSEG_EN,
                MLX5_TXQ_MAX_INLINE_LEN,
@@ -1432,6 +1441,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                .rx_vec_en = 1,
                .txq_inline = MLX5_ARG_UNSET,
                .txqs_inline = MLX5_ARG_UNSET,
+               .txqs_vec = MLX5_ARG_UNSET,
                .inline_max_packet_sz = MLX5_ARG_UNSET,
                .vf_nl_en = 1,
                .mprq = {
@@ -1443,6 +1453,9 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
        };
        /* Device speicific configuration. */
        switch (pci_dev->id.device_id) {
+       case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
+               dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
+               break;
        case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
        case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
        case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
@@ -1452,6 +1465,9 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
        default:
                break;
        }
+       /* Set architecture-dependent default value if unset. */
+       if (dev_config.txqs_vec == MLX5_ARG_UNSET)
+               dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
        for (i = 0; i != n; ++i) {
                uint32_t restore;
 

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 74d11c0..bc500b2 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -140,6 +140,7 @@ struct mlx5_dev_config {
        unsigned int ind_table_max_size; /* Maximum indirection table size. */
        int txq_inline; /* Maximum packet size for inlining. */
        int txqs_inline; /* Queue number threshold for inlining. */
+       int txqs_vec; /* Queue number threshold for vectorized Tx. */
        int inline_max_packet_sz; /* Max packet size for inlining. */
 };
 

diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index f2a1679..bfe6655 100644 (file)
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -60,8 +60,13 @@
 /* Maximum Packet headers size (L2+L3+L4) for TSO. */
 #define MLX5_MAX_TSO_HEADER 192
 
-/* Default minimum number of Tx queues for vectorized Tx. */
-#define MLX5_VPMD_MIN_TXQS 4
+/* Default maximum number of Tx queues for vectorized Tx. */
+#if defined(RTE_ARCH_ARM64)
+#define MLX5_VPMD_MAX_TXQS 8
+#else
+#define MLX5_VPMD_MAX_TXQS 4
+#endif
+#define MLX5_VPMD_MAX_TXQS_BLUEFIELD 16
 
 /* Threshold of buffer replenishment for vectorized Rx. */
 #define MLX5_VPMD_RXQ_RPLNSH_THRESH(n) \

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_vec.c
index 1453f4f..340292a 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx_vec.c
+++ b/drivers/net/mlx5/mlx5_rxtx_vec.c
@@ -277,7 +277,7 @@ mlx5_check_vec_tx_support(struct rte_eth_dev *dev)
        uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 
        if (!priv->config.tx_vec_en ||
-           priv->txqs_n > MLX5_VPMD_MIN_TXQS ||
+           priv->txqs_n > (unsigned int)priv->config.txqs_vec ||
            priv->config.mps != MLX5_MPW_ENHANCED ||
            offloads & ~MLX5_VEC_TX_OFFLOAD_CAP)
                return -ENOTSUP;