net/ice/base: add set/get GPIO helper functions
authorQi Zhang <qi.z.zhang@intel.com>
Tue, 13 Apr 2021 05:06:35 +0000 (13:06 +0800)
committerQi Zhang <qi.z.zhang@intel.com>
Tue, 13 Apr 2021 14:25:26 +0000 (16:25 +0200)
Add helper functions to set the GPIO pin state or get the value of a
GPIO signal that's the part of the topology based on AQ commands.
This change is needed to setup GPIO pins state for PTP, SyncE etc.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
drivers/net/ice/base/ice_adminq_cmd.h
drivers/net/ice/base/ice_common.c
drivers/net/ice/base/ice_common.h

index f9a741e..6b662b3 100644 (file)
@@ -1701,6 +1701,16 @@ struct ice_aqc_set_port_id_led {
        u8 rsvd[13];
 };
 
+/* Set/Get GPIO (direct, 0x06EC/0x06ED) */
+struct ice_aqc_gpio {
+       __le16 gpio_ctrl_handle;
+#define ICE_AQC_GPIO_HANDLE_S  0
+#define ICE_AQC_GPIO_HANDLE_M  (0x3FF << ICE_AQC_GPIO_HANDLE_S)
+       u8 gpio_num;
+       u8 gpio_val;
+       u8 rsvd[12];
+};
+
 /* Read/Write SFF EEPROM command (indirect 0x06EE) */
 struct ice_aqc_sff_eeprom {
        u8 lport_num;
@@ -2865,6 +2875,7 @@ struct ice_aq_desc {
                struct ice_aqc_restart_an restart_an;
                struct ice_aqc_i2c read_write_i2c;
                struct ice_aqc_read_i2c_resp read_i2c_resp;
+               struct ice_aqc_gpio read_write_gpio;
                struct ice_aqc_sff_eeprom read_write_sff_param;
                struct ice_aqc_set_port_id_led set_port_id_led;
                struct ice_aqc_get_sw_cfg get_sw_conf;
index befaa83..2424f3b 100644 (file)
@@ -4860,6 +4860,64 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
        return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
 
+/**
+ * ice_aq_set_gpio
+ * @hw: pointer to the hw struct
+ * @gpio_ctrl_handle: GPIO controller node handle
+ * @pin_idx: IO Number of the GPIO that needs to be set
+ * @value: SW provide IO value to set in the LSB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology
+ */
+enum ice_status
+ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
+               struct ice_sq_cd *cd)
+{
+       struct ice_aqc_gpio *cmd;
+       struct ice_aq_desc desc;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio);
+       cmd = &desc.params.read_write_gpio;
+       cmd->gpio_ctrl_handle = gpio_ctrl_handle;
+       cmd->gpio_num = pin_idx;
+       cmd->gpio_val = value ? 1 : 0;
+
+       return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+}
+
+/**
+ * ice_aq_get_gpio
+ * @hw: pointer to the hw struct
+ * @gpio_ctrl_handle: GPIO controller node handle
+ * @pin_idx: IO Number of the GPIO that needs to be set
+ * @value: IO value read
+ * @cd: pointer to command details structure or NULL
+ *
+ * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of
+ * the topology
+ */
+enum ice_status
+ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
+               bool *value, struct ice_sq_cd *cd)
+{
+       struct ice_aqc_gpio *cmd;
+       struct ice_aq_desc desc;
+       enum ice_status status;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);
+       cmd = &desc.params.read_write_gpio;
+       cmd->gpio_ctrl_handle = gpio_ctrl_handle;
+       cmd->gpio_num = pin_idx;
+
+       status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+       if (status)
+               return status;
+
+       *value = !!cmd->gpio_val;
+       return ICE_SUCCESS;
+}
+
 /**
  * ice_fw_supports_link_override
  * @hw: pointer to the hardware structure
index f9e3ed1..62b5052 100644 (file)
@@ -220,6 +220,12 @@ enum ice_status
 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
                     struct ice_aqc_txsched_elem_data *buf);
 enum ice_status
+ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
+               struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
+               bool *value, struct ice_sq_cd *cd);
+enum ice_status
 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
                    struct ice_sq_cd *cd);
 bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);