common/mlx5: read checksum capability from DevX
authorTal Shnaiderman <talshn@nvidia.com>
Wed, 21 Apr 2021 16:34:40 +0000 (19:34 +0300)
committerRaslan Darawsheh <rasland@nvidia.com>
Wed, 28 Apr 2021 09:16:46 +0000 (11:16 +0200)
mlx5 in Windows needs the hca capability csum_cap
to query the NIC for checksum offloading support.

Added the capability as part of the capabilities
queried by the PMD using DevX.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Odi Assli <odia@nvidia.com>
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h

index e168375..e3c8c68 100644 (file)
@@ -946,6 +946,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
        hcattr = MLX5_ADDR_OF(query_hca_cap_out, out, capability);
        attr->wqe_vlan_insert = MLX5_GET(per_protocol_networking_offload_caps,
                                         hcattr, wqe_vlan_insert);
+       attr->csum_cap = MLX5_GET(per_protocol_networking_offload_caps,
+                                        hcattr, csum_cap);
        attr->lro_cap = MLX5_GET(per_protocol_networking_offload_caps, hcattr,
                                 lro_cap);
        attr->tunnel_lro_gre = MLX5_GET(per_protocol_networking_offload_caps,
index 660e7d9..ce570ad 100644 (file)
@@ -102,6 +102,7 @@ struct mlx5_hca_attr {
        uint32_t eth_net_offloads:1;
        uint32_t eth_virt:1;
        uint32_t wqe_vlan_insert:1;
+       uint32_t csum_cap:1;
        uint32_t wqe_inline_mode:2;
        uint32_t vport_inline_mode:3;
        uint32_t tunnel_stateless_geneve_rx:1;