common/mlx5: check GENEVE TLV support in HCA attributes

This is preparation step to support match on GENEVE TLV option.

In this Patch we add the HCA attributes that will allow
supporting GENEVE TLV option matching.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index 4d01f52..861f75e 100644 (file)
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -690,6 +690,10 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
        attr->eth_virt = MLX5_GET(cmd_hca_cap, hcattr, eth_virt);
        attr->flex_parser_protocols = MLX5_GET(cmd_hca_cap, hcattr,
                                               flex_parser_protocols);
+       attr->max_geneve_tlv_options = MLX5_GET(cmd_hca_cap, hcattr,
+                       max_geneve_tlv_options);
+       attr->max_geneve_tlv_option_data_len = MLX5_GET(cmd_hca_cap, hcattr,
+                       max_geneve_tlv_option_data_len);
        attr->qos.sup = MLX5_GET(cmd_hca_cap, hcattr, qos);
        attr->vdpa.valid = !!(MLX5_GET64(cmd_hca_cap, hcattr,
                                         general_obj_types) &
@@ -717,6 +721,9 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
        attr->flow_hit_aso = !!(MLX5_GET64(cmd_hca_cap, hcattr,
                                           general_obj_types) &
                                MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO);
+       attr->geneve_tlv_opt = !!(MLX5_GET64(cmd_hca_cap, hcattr,
+                                          general_obj_types) &
+                               MLX5_GENERAL_OBJ_TYPES_CAP_GENEVE_TLV_OPT);
        attr->log_max_cq = MLX5_GET(cmd_hca_cap, hcattr, log_max_cq);
        attr->log_max_qp = MLX5_GET(cmd_hca_cap, hcattr, log_max_qp);
        attr->log_max_cq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_cq_sz);

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index 8d993df..1e0a48d 100644 (file)
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -97,6 +97,8 @@ struct mlx5_hca_attr {
        uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS];
        uint16_t lro_min_mss_size;
        uint32_t flex_parser_protocols;
+       uint32_t max_geneve_tlv_options;
+       uint32_t max_geneve_tlv_option_data_len;
        uint32_t hairpin:1;
        uint32_t log_max_hairpin_queues:5;
        uint32_t log_max_hairpin_wq_data_sz:5;
@@ -116,6 +118,7 @@ struct mlx5_hca_attr {
        uint32_t regex:1;
        uint32_t regexp_num_of_engines;
        uint32_t log_max_ft_sampler_num:8;
+       uint32_t geneve_tlv_opt;
        struct mlx5_hca_qos_attr qos;
        struct mlx5_hca_vdpa_attr vdpa;
        int log_max_qp_sz;
@@ -481,6 +484,7 @@ struct mlx5_devx_obj *mlx5_devx_cmd_create_flex_parser(void *ctx,
 __rte_internal
 int mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id,
                                uint32_t arg, uint32_t *data, uint32_t dw_cnt);
+
 /**
  * Create virtio queue counters object DevX API.
  *

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index ad07e79..c9eba22 100644 (file)
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -789,7 +789,7 @@ struct mlx5_ifc_fte_match_set_misc3_bits {
        u8 icmp_code[0x8];
        u8 icmpv6_type[0x8];
        u8 icmpv6_code[0x8];
-       u8 reserved_at_120[0x20];
+       u8 geneve_tlv_option_0_data[0x20];
        u8 gtpu_teid[0x20];
        u8 gtpu_msg_type[0x08];
        u8 gtpu_msg_flags[0x08];
@@ -1087,6 +1087,8 @@ enum {
                        (1ULL << MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH)
 #define MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO \
                        (1ULL << MLX5_GENERAL_OBJ_TYPE_FLOW_HIT_ASO)
+#define MLX5_GENERAL_OBJ_TYPES_CAP_GENEVE_TLV_OPT \
+                       (1ULL << MLX5_OBJ_TYPE_GENEVE_TLV_OPT)
 
 enum {
        MLX5_HCA_CAP_OPMOD_GET_MAX   = 0,
@@ -1385,8 +1387,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8 reserved_at_500[0x20];
        u8 num_of_uars_per_page[0x20];
        u8 flex_parser_protocols[0x20];
-       u8 reserved_at_560[0x20];
-       u8 reserved_at_580[0x3c];
+       u8 max_geneve_tlv_options[0x8];
+       u8 reserved_at_568[0x3];
+       u8 max_geneve_tlv_option_data_len[0x5];
+       u8 reserved_at_570[0x4c];
        u8 mini_cqe_resp_stride_index[0x1];
        u8 cqe_128_always[0x1];
        u8 cqe_compression_128[0x1];
@@ -2297,6 +2301,7 @@ struct mlx5_ifc_create_cq_in_bits {
 };
 
 enum {
+       MLX5_OBJ_TYPE_GENEVE_TLV_OPT = 0x000b,
        MLX5_GENERAL_OBJ_TYPE_VIRTQ = 0x000d,
        MLX5_GENERAL_OBJ_TYPE_VIRTIO_Q_COUNTERS = 0x001c,
        MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH = 0x0022,
@@ -2331,6 +2336,17 @@ struct mlx5_ifc_virtio_q_counters_bits {
        u8 reserved_at_180[0x50];
 };
 
+struct mlx5_ifc_geneve_tlv_option_bits {
+       u8 modify_field_select[0x40];
+       u8 reserved_at_40[0x18];
+       u8 geneve_option_fte_index[0x8];
+       u8 option_class[0x10];
+       u8 option_type[0x8];
+       u8 reserved_at_78[0x3];
+       u8 option_data_length[0x5];
+       u8 reserved_at_80[0x180];
+};
+
 struct mlx5_ifc_create_virtio_q_counters_in_bits {
        struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
        struct mlx5_ifc_virtio_q_counters_bits virtio_q_counters;
@@ -2340,6 +2356,12 @@ struct mlx5_ifc_query_virtio_q_counters_out_bits {
        struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
        struct mlx5_ifc_virtio_q_counters_bits virtio_q_counters;
 };
+
+struct mlx5_ifc_create_geneve_tlv_option_in_bits {
+       struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
+       struct mlx5_ifc_geneve_tlv_option_bits geneve_tlv_opt;
+};
+
 enum {
        MLX5_VIRTQ_STATE_INIT = 0,
        MLX5_VIRTQ_STATE_RDY = 1,