doc: update guide and release notes for mlx5

Signed-off-by: Olga Shern <olgas@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: John McNamara <john.mcnamara@intel.com>

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 063c4a5..5c10cd3 100644 (file)
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -154,6 +154,11 @@ Run-time configuration
   allows to save PCI bandwidth and improve performance at the cost of a
   slightly higher CPU usage.  Enabled by default.
 
+  Supported on:
+
+  - x86_64 with ConnectX4 and ConnectX4 LX
+  - Power8 with ConnectX4 LX
+
 - ``txq_inline`` parameter [int]
 
   Amount of data to be inlined during TX operations. Improves latency.
@@ -234,7 +239,7 @@ DPDK and must be installed separately:
 
 Currently supported by DPDK:
 
-- Mellanox OFED **3.3-1.0.0.0**.
+- Mellanox OFED **3.3-1.0.0.0** and **3.3-2.0.0.0**.
 
 - Minimum firmware version:
 

diff --git a/doc/guides/rel_notes/release_16_07.rst b/doc/guides/rel_notes/release_16_07.rst
index d00a6ed..e517e12 100644 (file)
--- a/doc/guides/rel_notes/release_16_07.rst
+++ b/doc/guides/rel_notes/release_16_07.rst
@@ -94,6 +94,21 @@ New Features
   * Added MTU update in non Scattered Rx mode and enabled MTU of up to 9208
     with UCS Software release 2.2 on 1300 series VICs.
 
+* **Updated the mlx5 driver.**
+
+  The mlx5 driver was updated with changes including the following:
+
+  * Data path was refactored to bypass Verbs to improve RX and TX performance.
+  * Removed compilation parameters for inline send, ``MLX5_MAX_INLINE``, and
+    added command line parameter instead, ``txq_inline``.
+  * Improved TX scatter gather support:
+    Removed compilation parameter ``MLX5_PMD_SGE_WR_N``.
+    Scatter-gather elements is set to the maximum value the NIC supports.
+    Removed linearization logic, this decreases the memory consumption of the PMD.
+  * Improved jumbo frames support, by dynamically setting RX scatter gather elements
+    according to the MTU and mbuf size,
+    no need for compilation parameter ``MLX5_PMD_SGE_WR_N``
+
 * **Added support for virtio on IBM POWER8.**
 
   The ioports are mapped in memory when using Linux UIO.