net/cnxk: reflect globally enabled offloads in queue conf
authorNithin Dabilpuram <ndabilpuram@marvell.com>
Fri, 1 Oct 2021 13:40:22 +0000 (19:10 +0530)
committerJerin Jacob <jerinj@marvell.com>
Sat, 2 Oct 2021 13:45:33 +0000 (15:45 +0200)
Reflect globally enabled Rx and Tx offloads in queue conf.
Also fix issue with lmt data prepare for multi seg.

Fixes: a24af6361e37 ("net/cnxk: add Tx queue setup and release")
Fixes: a86144cd9ded ("net/cnxk: add Rx queue setup and release")
Fixes: 305ca2c4c382 ("net/cnxk: support multi-segment vector Tx")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
drivers/net/cnxk/cn10k_tx.h
drivers/net/cnxk/cnxk_ethdev.c

index ad84464..c6f349b 100644 (file)
@@ -1280,7 +1280,7 @@ cn10k_nix_prep_lmt_mseg_vector(struct rte_mbuf **mbufs, uint64x2_t *cmd0,
                        vst1q_u64(lmt_addr + 14, cmd1[3]);
 
                        *data128 |= ((__uint128_t)7) << *shift;
-                       shift += 3;
+                       *shift += 3;
 
                        return 1;
                }
index 03e4e68..ec00e62 100644 (file)
@@ -380,6 +380,8 @@ cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
        txq_sp->dev = dev;
        txq_sp->qid = qid;
        txq_sp->qconf.conf.tx = *tx_conf;
+       /* Queue config should reflect global offloads */
+       txq_sp->qconf.conf.tx.offloads = dev->tx_offloads;
        txq_sp->qconf.nb_desc = nb_desc;
 
        plt_nix_dbg("sq=%d fc=%p offload=0x%" PRIx64 " lmt_addr=%p"
@@ -527,6 +529,8 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,
        rxq_sp->dev = dev;
        rxq_sp->qid = qid;
        rxq_sp->qconf.conf.rx = *rx_conf;
+       /* Queue config should reflect global offloads */
+       rxq_sp->qconf.conf.rx.offloads = dev->rx_offloads;
        rxq_sp->qconf.nb_desc = nb_desc;
        rxq_sp->qconf.mp = mp;