net/softnic: fix IPv6 endianness

Fix IPv6 endianness from big endian to CPU order.

Fixes: ee19326a4b ("net/softnic: add command for pipeline table entries")
Cc: stable@dpdk.org
Signed-off-by: Reshma Pattan <reshma.pattan@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

diff --git a/drivers/net/softnic/rte_eth_softnic_thread.c b/drivers/net/softnic/rte_eth_softnic_thread.c
index 76217fc..87b5592 100644 (file)
--- a/drivers/net/softnic/rte_eth_softnic_thread.c
+++ b/drivers/net/softnic/rte_eth_softnic_thread.c
@@ -2240,29 +2240,37 @@ match_convert(struct softnic_table_rule_match *mh,
                                ml->acl_add.field_value[0].mask_range.u8 =
                                        mh->match.acl.proto_mask;
 
-                               ml->acl_add.field_value[1].value.u32 = sa32[0];
+                               ml->acl_add.field_value[1].value.u32 =
+                                       rte_be_to_cpu_32(sa32[0]);
                                ml->acl_add.field_value[1].mask_range.u32 =
                                        sa32_depth[0];
-                               ml->acl_add.field_value[2].value.u32 = sa32[1];
+                               ml->acl_add.field_value[2].value.u32 =
+                                       rte_be_to_cpu_32(sa32[1]);
                                ml->acl_add.field_value[2].mask_range.u32 =
                                        sa32_depth[1];
-                               ml->acl_add.field_value[3].value.u32 = sa32[2];
+                               ml->acl_add.field_value[3].value.u32 =
+                                       rte_be_to_cpu_32(sa32[2]);
                                ml->acl_add.field_value[3].mask_range.u32 =
                                        sa32_depth[2];
-                               ml->acl_add.field_value[4].value.u32 = sa32[3];
+                               ml->acl_add.field_value[4].value.u32 =
+                                       rte_be_to_cpu_32(sa32[3]);
                                ml->acl_add.field_value[4].mask_range.u32 =
                                        sa32_depth[3];
 
-                               ml->acl_add.field_value[5].value.u32 = da32[0];
+                               ml->acl_add.field_value[5].value.u32 =
+                                       rte_be_to_cpu_32(da32[0]);
                                ml->acl_add.field_value[5].mask_range.u32 =
                                        da32_depth[0];
-                               ml->acl_add.field_value[6].value.u32 = da32[1];
+                               ml->acl_add.field_value[6].value.u32 =
+                                       rte_be_to_cpu_32(da32[1]);
                                ml->acl_add.field_value[6].mask_range.u32 =
                                        da32_depth[1];
-                               ml->acl_add.field_value[7].value.u32 = da32[2];
+                               ml->acl_add.field_value[7].value.u32 =
+                                       rte_be_to_cpu_32(da32[2]);
                                ml->acl_add.field_value[7].mask_range.u32 =
                                        da32_depth[2];
-                               ml->acl_add.field_value[8].value.u32 = da32[3];
+                               ml->acl_add.field_value[8].value.u32 =
+                                       rte_be_to_cpu_32(da32[3]);
                                ml->acl_add.field_value[8].mask_range.u32 =
                                        da32_depth[3];
 
@@ -2302,36 +2310,36 @@ match_convert(struct softnic_table_rule_match *mh,
                                        mh->match.acl.proto_mask;
 
                                ml->acl_delete.field_value[1].value.u32 =
-                                       sa32[0];
+                                       rte_be_to_cpu_32(sa32[0]);
                                ml->acl_delete.field_value[1].mask_range.u32 =
                                        sa32_depth[0];
                                ml->acl_delete.field_value[2].value.u32 =
-                                       sa32[1];
+                                       rte_be_to_cpu_32(sa32[1]);
                                ml->acl_delete.field_value[2].mask_range.u32 =
                                        sa32_depth[1];
                                ml->acl_delete.field_value[3].value.u32 =
-                                       sa32[2];
+                                       rte_be_to_cpu_32(sa32[2]);
                                ml->acl_delete.field_value[3].mask_range.u32 =
                                        sa32_depth[2];
                                ml->acl_delete.field_value[4].value.u32 =
-                                       sa32[3];
+                                       rte_be_to_cpu_32(sa32[3]);
                                ml->acl_delete.field_value[4].mask_range.u32 =
                                        sa32_depth[3];
 
                                ml->acl_delete.field_value[5].value.u32 =
-                                       da32[0];
+                                       rte_be_to_cpu_32(da32[0]);
                                ml->acl_delete.field_value[5].mask_range.u32 =
                                        da32_depth[0];
                                ml->acl_delete.field_value[6].value.u32 =
-                                       da32[1];
+                                       rte_be_to_cpu_32(da32[1]);
                                ml->acl_delete.field_value[6].mask_range.u32 =
                                        da32_depth[1];
                                ml->acl_delete.field_value[7].value.u32 =
-                                       da32[2];
+                                       rte_be_to_cpu_32(da32[2]);
                                ml->acl_delete.field_value[7].mask_range.u32 =
                                        da32_depth[2];
                                ml->acl_delete.field_value[8].value.u32 =
-                                       da32[3];
+                                       rte_be_to_cpu_32(da32[3]);
                                ml->acl_delete.field_value[8].mask_range.u32 =
                                        da32_depth[3];