e1000: more error checks
authorIntel <intel.com>
Fri, 8 Nov 2013 02:00:00 +0000 (03:00 +0100)
committerThomas Monjalon <thomas.monjalon@6wind.com>
Sun, 24 Nov 2013 00:31:33 +0000 (01:31 +0100)
Signed-off-by: Intel
lib/librte_pmd_e1000/e1000/e1000_80003es2lan.c
lib/librte_pmd_e1000/e1000/e1000_82571.c

index 1652479..60d7c2a 100644 (file)
@@ -842,6 +842,9 @@ STATIC s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
        ctrl = E1000_READ_REG(hw, E1000_CTRL);
 
        ret_val = e1000_acquire_phy_80003es2lan(hw);
+       if (ret_val)
+               return ret_val;
+
        DEBUGOUT("Issuing a global reset to MAC\n");
        E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
        e1000_release_phy_80003es2lan(hw);
@@ -903,6 +906,8 @@ STATIC s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
 
        /* Setup link and flow control */
        ret_val = mac->ops.setup_link(hw);
+       if (ret_val)
+               return ret_val;
 
        /* Disable IBIST slave mode (far-end loopback) */
        e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,
index 4aa33c4..5eec577 100644 (file)
@@ -1007,6 +1007,8 @@ STATIC s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
                /* When LPLU is enabled, we should disable SmartSpeed */
                ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
                                            &data);
+               if (ret_val)
+                       return ret_val;
                data &= ~IGP01E1000_PSCFR_SMART_SPEED;
                ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
                                             data);
@@ -1916,6 +1918,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
                        if (ret_val)
                                return ret_val;
                        ret_val = nvm->ops.update(hw);
+                       if (ret_val)
+                               return ret_val;
                }
        }