}
idev->db_pages = bar->vaddr;
- idev->phy_db_pages = bar->bus_addr;
return 0;
}
.q_init.type = q->type,
.q_init.index = q->index,
.q_init.flags = IONIC_QINIT_F_ENA,
- .q_init.pid = q->pid,
.q_init.intr_index = intr_index,
.q_init.ring_size = rte_log2_u32(q->num_descs),
.q_init.ring_base = q->base_pa,
int
ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
struct ionic_queue *q, uint32_t index, uint32_t num_descs,
- size_t desc_size, size_t sg_desc_size, uint32_t pid)
+ size_t desc_size, size_t sg_desc_size)
{
uint32_t ring_size;
q->sg_desc_size = sg_desc_size;
q->head_idx = 0;
q->tail_idx = 0;
- q->pid = pid;
return 0;
}
union ionic_dev_cmd_regs __iomem *dev_cmd;
struct ionic_doorbell __iomem *db_pages;
- rte_iova_t phy_db_pages;
-
struct ionic_intr __iomem *intr_ctrl;
-
struct ionic_intr_status __iomem *intr_status;
struct ionic_port_info *port_info;
uint32_t num_descs;
uint32_t desc_size;
uint32_t sg_desc_size;
- uint32_t pid;
uint32_t qid;
uint32_t qtype;
struct ionic_doorbell __iomem *db;
- void *nop_desc;
};
#define IONIC_INTR_INDEX_NOT_ASSIGNED (-1)
int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
struct ionic_queue *q, uint32_t index, uint32_t num_descs,
- size_t desc_size, size_t sg_desc_size, uint32_t pid);
+ size_t desc_size, size_t sg_desc_size);
void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
void ionic_q_flush(struct ionic_queue *q);
if (err)
return err;
- lif->mtu = new_mtu;
-
return 0;
}
uint32_t desc_size,
uint32_t cq_desc_size,
uint32_t sg_desc_size,
- uint32_t pid, struct ionic_qcq **qcq)
+ struct ionic_qcq **qcq)
{
struct ionic_dev *idev = &lif->adapter->idev;
struct ionic_qcq *new;
new->q.type = type;
err = ionic_q_init(lif, idev, &new->q, index, num_descs,
- desc_size, sg_desc_size, pid);
+ desc_size, sg_desc_size);
if (err) {
IONIC_PRINT(ERR, "Queue initialization failed");
return err;
sizeof(struct ionic_rxq_desc),
sizeof(struct ionic_rxq_comp),
sizeof(struct ionic_rxq_sg_desc),
- lif->kern_pid, &lif->rxqcqs[index]);
+ &lif->rxqcqs[index]);
if (err)
return err;
sizeof(struct ionic_txq_desc),
sizeof(struct ionic_txq_comp),
sizeof(struct ionic_txq_sg_desc),
- lif->kern_pid, &lif->txqcqs[index]);
+ &lif->txqcqs[index]);
if (err)
return err;
sizeof(struct ionic_admin_cmd),
sizeof(struct ionic_admin_comp),
0,
- lif->kern_pid, &lif->adminqcq);
+ &lif->adminqcq);
if (err)
return err;
sizeof(struct ionic_notifyq_cmd),
sizeof(union ionic_notifyq_comp),
0,
- lif->kern_pid, &lif->notifyqcq);
+ &lif->notifyqcq);
if (err)
return err;
rte_spinlock_init(&lif->adminq_lock);
rte_spinlock_init(&lif->adminq_service_lock);
- lif->kern_pid = 0;
-
dbpage_num = ionic_db_page_num(lif, 0);
lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num);
.index = q->index,
.flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA),
.intr_index = qcq->intr.index,
- .pid = q->pid,
.ring_size = rte_log2_u32(q->num_descs),
.ring_base = q->base_pa,
}
};
- IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid);
IONIC_PRINT(DEBUG, "notifyq_init.index %d",
ctx.cmd.q_init.index);
IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
.index = q->index,
.flags = IONIC_QINIT_F_SG,
.intr_index = cq->bound_intr->index,
- .pid = q->pid,
.ring_size = rte_log2_u32(q->num_descs),
.ring_base = q->base_pa,
.cq_ring_base = cq->base_pa,
};
int err;
- IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid);
IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
ctx.cmd.q_init.ring_base);
.index = q->index,
.flags = IONIC_QINIT_F_SG,
.intr_index = cq->bound_intr->index,
- .pid = q->pid,
.ring_size = rte_log2_u32(q->num_descs),
.ring_base = q->base_pa,
.cq_ring_base = cq->base_pa,
};
int err;
- IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid);
IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
ctx.cmd.q_init.ring_base);