config/arm: add Marvell CN10K

Add config support to cross compile for Marvell CN10K SoC.
Marvell CN10K SoC is based on ARM Neoverse N2 cores.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/config/arm/arm64_cn10k_linux_gcc b/config/arm/arm64_cn10k_linux_gcc
new file mode 100644 (file)
index 0000000..a3578c0
--- /dev/null
+++ b/config/arm/arm64_cn10k_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8.6-a'
+endian = 'little'
+
+[properties]
+platform = 'cn10k'

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 86cdb9b..18b820d 100644 (file)
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -229,6 +229,17 @@ soc_bluefield = {
        'numa': false
 }
 
+soc_cn10k = {
+       'description' : 'Marvell OCTEON 10',
+       'implementer' : '0x41',
+       'flags': [
+               ['RTE_MAX_LCORE', 24],
+               ['RTE_MAX_NUMA_NODES', 1]
+       ],
+       'part_number': '0xd49',
+       'numa': false
+}
+
 soc_dpaa = {
        'description': 'NXP DPAA',
        'implementer': '0x41',
@@ -320,6 +331,7 @@ socs = {
        'generic': soc_generic,
        'armada': soc_armada,
        'bluefield': soc_bluefield,
+       'cn10k' : soc_cn10k,
        'dpaa': soc_dpaa,
        'emag': soc_emag,
        'graviton2': soc_graviton2,