STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err);
+ u8 *bytes, int *perrno);
STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err);
+ u8 *bytes, int *perrno);
STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err);
+ u8 *bytes, int *perrno);
STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- int *err);
+ int *perrno);
STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- int *err);
+ int *perrno);
STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err);
+ u8 *bytes, int *perrno);
STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err);
+ u8 *bytes, int *perrno);
STATIC inline u8 i40e_nvmupd_get_module(u32 val)
{
return (u8)(val & I40E_NVM_MOD_PNT_MASK);
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command
* @bytes: pointer to the data buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* Dispatches command depending on what update state is current
**/
enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err)
+ u8 *bytes, int *perrno)
{
enum i40e_status_code status;
DEBUGFUNC("i40e_nvmupd_command");
/* assume success */
- *err = 0;
+ *perrno = 0;
switch (hw->nvmupd_state) {
case I40E_NVMUPD_STATE_INIT:
- status = i40e_nvmupd_state_init(hw, cmd, bytes, err);
+ status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);
break;
case I40E_NVMUPD_STATE_READING:
- status = i40e_nvmupd_state_reading(hw, cmd, bytes, err);
+ status = i40e_nvmupd_state_reading(hw, cmd, bytes, perrno);
break;
case I40E_NVMUPD_STATE_WRITING:
- status = i40e_nvmupd_state_writing(hw, cmd, bytes, err);
+ status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno);
break;
default:
/* invalid state, should never happen */
status = I40E_NOT_SUPPORTED;
- *err = -ESRCH;
+ *perrno = -ESRCH;
break;
}
return status;
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
* @bytes: pointer to the data buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* Process legitimate commands of the Init state and conditionally set next
* state. Reject all other commands.
**/
STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err)
+ u8 *bytes, int *perrno)
{
enum i40e_status_code status = I40E_SUCCESS;
enum i40e_nvmupd_cmd upd_cmd;
DEBUGFUNC("i40e_nvmupd_state_init");
- upd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);
+ upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
switch (upd_cmd) {
case I40E_NVMUPD_READ_SA:
status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
if (status) {
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
} else {
- status = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
i40e_release_nvm(hw);
}
break;
case I40E_NVMUPD_READ_SNT:
status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
if (status) {
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
} else {
- status = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
hw->nvmupd_state = I40E_NVMUPD_STATE_READING;
}
break;
case I40E_NVMUPD_WRITE_ERA:
status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
if (status) {
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
} else {
- status = i40e_nvmupd_nvm_erase(hw, cmd, err);
+ status = i40e_nvmupd_nvm_erase(hw, cmd, perrno);
if (status)
i40e_release_nvm(hw);
else
case I40E_NVMUPD_WRITE_SA:
status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
if (status) {
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
} else {
- status = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (status)
i40e_release_nvm(hw);
else
case I40E_NVMUPD_WRITE_SNT:
status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
if (status) {
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
} else {
- status = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
}
break;
case I40E_NVMUPD_CSUM_SA:
status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
if (status) {
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
} else {
status = i40e_update_nvm_checksum(hw);
if (status) {
- *err = hw->aq.asq_last_status ?
+ *perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(hw->aq.asq_last_status) :
-EIO;
i40e_release_nvm(hw);
default:
status = I40E_ERR_NVM;
- *err = -ESRCH;
+ *perrno = -ESRCH;
break;
}
return status;
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
* @bytes: pointer to the data buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* NVM ownership is already held. Process legitimate commands and set any
* change in state; reject all other commands.
**/
STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err)
+ u8 *bytes, int *perrno)
{
enum i40e_status_code status;
enum i40e_nvmupd_cmd upd_cmd;
DEBUGFUNC("i40e_nvmupd_state_reading");
- upd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);
+ upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
switch (upd_cmd) {
case I40E_NVMUPD_READ_SA:
case I40E_NVMUPD_READ_CON:
- status = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
break;
case I40E_NVMUPD_READ_LCB:
- status = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
i40e_release_nvm(hw);
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
break;
default:
status = I40E_NOT_SUPPORTED;
- *err = -ESRCH;
+ *perrno = -ESRCH;
break;
}
return status;
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
* @bytes: pointer to the data buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* NVM ownership is already held. Process legitimate commands and set any
* change in state; reject all other commands
**/
STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err)
+ u8 *bytes, int *perrno)
{
enum i40e_status_code status;
enum i40e_nvmupd_cmd upd_cmd;
DEBUGFUNC("i40e_nvmupd_state_writing");
- upd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);
+ upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
switch (upd_cmd) {
case I40E_NVMUPD_WRITE_CON:
- status = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
break;
case I40E_NVMUPD_WRITE_LCB:
- status = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);
+ status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (!status) {
hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
case I40E_NVMUPD_CSUM_CON:
status = i40e_update_nvm_checksum(hw);
if (status)
- *err = hw->aq.asq_last_status ?
+ *perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(hw->aq.asq_last_status) :
-EIO;
break;
case I40E_NVMUPD_CSUM_LCB:
status = i40e_update_nvm_checksum(hw);
if (status) {
- *err = hw->aq.asq_last_status ?
+ *perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(hw->aq.asq_last_status) :
-EIO;
} else {
default:
status = I40E_NOT_SUPPORTED;
- *err = -ESRCH;
+ *perrno = -ESRCH;
break;
}
return status;
* i40e_nvmupd_validate_command - Validate given command
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* Return one of the valid command types or I40E_NVMUPD_INVALID
**/
STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- int *err)
+ int *perrno)
{
enum i40e_nvmupd_cmd upd_cmd;
u8 transaction, module;
(cmd->data_size > I40E_NVMUPD_MAX_DATA)) {
DEBUGOUT1("i40e_nvmupd_validate_command data_size %d\n",
cmd->data_size);
- *err = -EFAULT;
+ *perrno = -EFAULT;
return I40E_NVMUPD_INVALID;
}
}
if (upd_cmd == I40E_NVMUPD_INVALID) {
- *err = -EFAULT;
+ *perrno = -EFAULT;
DEBUGOUT2(
- "i40e_nvmupd_validate_command returns %d err: %d\n",
- upd_cmd, *err);
+ "i40e_nvmupd_validate_command returns %d perrno: %d\n",
+ upd_cmd, *perrno);
}
return upd_cmd;
}
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
* @bytes: pointer to the data buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* cmd structure contains identifiers and data buffer
**/
STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err)
+ u8 *bytes, int *perrno)
{
enum i40e_status_code status;
u8 module, transaction;
bytes, last, NULL);
DEBUGOUT1("i40e_nvmupd_nvm_read status %d\n", status);
if (status != I40E_SUCCESS)
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
return status;
}
* i40e_nvmupd_nvm_erase - Erase an NVM module
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* module, offset, data_size and data are in cmd structure
**/
STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- int *err)
+ int *perrno)
{
enum i40e_status_code status = I40E_SUCCESS;
u8 module, transaction;
last, NULL);
DEBUGOUT1("i40e_nvmupd_nvm_erase status %d\n", status);
if (status != I40E_SUCCESS)
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
return status;
}
* @hw: pointer to hardware structure
* @cmd: pointer to nvm update command buffer
* @bytes: pointer to the data buffer
- * @err: pointer to return error code
+ * @perrno: pointer to return error code
*
* module, offset, data_size and data are in cmd structure
**/
STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
- u8 *bytes, int *err)
+ u8 *bytes, int *perrno)
{
enum i40e_status_code status = I40E_SUCCESS;
u8 module, transaction;
(u16)cmd->data_size, bytes, last, NULL);
DEBUGOUT1("i40e_nvmupd_nvm_write status %d\n", status);
if (status != I40E_SUCCESS)
- *err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
+ *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
return status;
}