CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
-# QLogic 25G/40G/100G PMD
+# QLogic 10G/25G/40G/100G PMD
#
CONFIG_RTE_LIBRTE_QEDE_PMD=y
CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n
; Refer to default.ini for the full list of available PMD features.
;
[Features]
+Speed capabilities = Y
Link status = Y
Link status event = Y
MTU update = Y
; Refer to default.ini for the full list of available PMD features.
;
[Features]
+Speed capabilities = Y
Link status = Y
Link status event = Y
MTU update = Y
Supported QLogic Adapters
-------------------------
-- QLogic FastLinQ QL4xxxx 25G/40G/100G CNAs.
+- QLogic FastLinQ QL4xxxx 10G/25G/40G/100G CNAs.
Prerequisites
-------------
struct qede_dev *qdev = eth_dev->data->dev_private;
struct ecore_dev *edev = &qdev->edev;
struct qed_link_output link;
+ uint32_t speed_cap = 0;
PMD_INIT_FUNC_TRACE(edev);
memset(&link, 0, sizeof(struct qed_link_output));
qdev->ops->common->get_link(edev, &link);
- dev_info->speed_capa = rte_eth_speed_bitflag(link.adv_speed, 0);
+ if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
+ speed_cap |= ETH_LINK_SPEED_1G;
+ if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
+ speed_cap |= ETH_LINK_SPEED_10G;
+ if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
+ speed_cap |= ETH_LINK_SPEED_25G;
+ if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
+ speed_cap |= ETH_LINK_SPEED_40G;
+ if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
+ speed_cap |= ETH_LINK_SPEED_50G;
+ if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
+ speed_cap |= ETH_LINK_SPEED_100G;
+ dev_info->speed_capa = speed_cap;
}
/* return 0 means link status changed, -1 means not changed */
uint32_t advertised_caps; /* In ADVERTISED defs */
uint32_t lp_caps; /* In ADVERTISED defs */
uint32_t speed; /* In Mb/s */
- uint32_t adv_speed; /* In Mb/s */
+ uint32_t adv_speed; /* Speed mask */
uint8_t duplex; /* In DUPLEX defs */
uint8_t port; /* In PORT defs */
bool autoneg;
struct ecore_mcp_link_state link;
struct ecore_mcp_link_capabilities link_caps;
uint32_t media_type;
- uint32_t adv_speed;
uint8_t change = 0;
memset(if_link, 0, sizeof(*if_link));
if_link->duplex = QEDE_DUPLEX_FULL;
- /* Fill up the native advertised speed */
- switch (params.speed.advertised_speeds) {
- case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G:
- adv_speed = 10000;
- break;
- case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G:
- adv_speed = 25000;
- break;
- case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G:
- adv_speed = 40000;
- break;
- case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G:
- adv_speed = 50000;
- break;
- case NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G:
- adv_speed = 100000;
- break;
- default:
- DP_NOTICE(hwfn, false, "Unknown speed\n");
- adv_speed = 0;
- }
- if_link->adv_speed = adv_speed;
+ /* Fill up the native advertised speed cap mask */
+ if_link->adv_speed = params.speed.advertised_speeds;
if (params.speed.autoneg)
if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;