]> git.droids-corp.org - dpdk.git/commitdiff
gpudev: fix page alignment in communication list
authorElena Agostini <eagostini@nvidia.com>
Tue, 8 Mar 2022 23:59:47 +0000 (23:59 +0000)
committerThomas Monjalon <thomas@monjalon.net>
Tue, 8 Mar 2022 23:14:55 +0000 (00:14 +0100)
Memory allocated for CPU mapping the status flag
in the communication list should be aligned to the
GPU page size, which can be different of CPU page alignment.

The GPU page size is added to the GPU info,
and is used when creating a communication list.

Fixes: 9b8cae4d991e ("gpudev: use CPU mapping in communication list")
Signed-off-by: Elena Agostini <eagostini@nvidia.com>
drivers/gpu/cuda/cuda.c
lib/gpudev/gpudev.c
lib/gpudev/rte_gpudev.h

index cf9e59535cd7025b05e3ea64b5bb06f08e5eb121..8505d39d64e55c4218654366dddeeaa2adce0208 100644 (file)
@@ -523,6 +523,8 @@ cuda_dev_info_get(struct rte_gpu *dev, struct rte_gpu_info *info)
                }
                dev->mpshared->info.total_memory = parent_info.total_memory;
 
+               dev->mpshared->info.page_size = parent_info.page_size;
+
                /*
                 * GPU Device private info
                 */
@@ -1173,6 +1175,8 @@ cuda_gpu_probe(__rte_unused struct rte_pci_driver *pci_drv, struct rte_pci_devic
                return -rte_errno;
        }
 
+       dev->mpshared->info.page_size = (size_t)GPU_PAGE_SIZE;
+
        /*
         * GPU Device private info
         */
index fb1bee344c6e391153301aa718780b43683d659d..56033f4a5f2f666c80da8e539117824bba61f9c7 100644 (file)
@@ -820,6 +820,7 @@ rte_gpu_comm_create_list(uint16_t dev_id,
        uint32_t idx_l;
        int ret;
        struct rte_gpu *dev;
+       struct rte_gpu_info info;
 
        if (num_comm_items == 0) {
                rte_errno = EINVAL;
@@ -833,6 +834,12 @@ rte_gpu_comm_create_list(uint16_t dev_id,
                return NULL;
        }
 
+       ret = rte_gpu_info_get(dev_id, &info);
+       if (ret < 0) {
+               rte_errno = ENODEV;
+               return NULL;
+       }
+
        comm_list = rte_zmalloc(NULL,
                        sizeof(struct rte_gpu_comm_list) * num_comm_items, 0);
        if (comm_list == NULL) {
@@ -855,7 +862,7 @@ rte_gpu_comm_create_list(uint16_t dev_id,
         */
        comm_list[0].status_d = rte_gpu_mem_alloc(dev_id,
                        sizeof(enum rte_gpu_comm_list_status) * num_comm_items,
-                       rte_mem_page_size());
+                       info.page_size);
        if (ret < 0) {
                rte_errno = ENOMEM;
                return NULL;
index 7e2401a4b731a9dfc784ab7ffef54c9e9e8615fe..0a94a6abc459abc775817be19c7868917cb456fd 100644 (file)
@@ -59,7 +59,9 @@ struct rte_gpu_info {
        uint32_t processor_count;
        /** Total memory available on device. */
        size_t total_memory;
-       /* Local NUMA memory ID. -1 if unknown. */
+       /** GPU memory page size. */
+       size_t page_size;
+       /** Local NUMA memory ID. -1 if unknown. */
        int16_t numa_node;
 };