ixgbe/base: rework mac-type-dependent constants

Add a const u32 *mvals pointer to the ixgbe_hw struct to point to an
array of mac-type-dependent values. These can include register
offsets, masks, whatever can be in a u32. When the ixgbe_hw struct
is initialized, a pointer to the appropriate array must be set.

The IXGBE_I2CCTL register references are changed to use it.
Use the mvals array to hold differing values used for
IXGBE_I2C_* symbols.
Use the mvals array to hold differing values used for
IXGBE_*_GPI* symbols.
Use the mvals array to hold differing values use for CIAA and
CIAD symbols.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>

diff --git a/drivers/net/ixgbe/base/ixgbe_api.c b/drivers/net/ixgbe/base/ixgbe_api.c
index 916d744..0c4f8d8 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_api.c
+++ b/drivers/net/ixgbe/base/ixgbe_api.c
@@ -34,6 +34,24 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "ixgbe_api.h"
 #include "ixgbe_common.h"
 
+#define IXGBE_EMPTY_PARAM
+
+static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
+       IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
+};
+
+static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
+       IXGBE_MVALS_INIT(_X540)
+};
+
+static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
+       IXGBE_MVALS_INIT(_X550)
+};
+
+static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
+       IXGBE_MVALS_INIT(_X550EM_x)
+};
+
 /**
  * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
  * @hw: pointer to hardware structure
@@ -119,6 +137,8 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
                return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
        }
 
+       hw->mvals = ixgbe_mvals_base;
+
        switch (hw->device_id) {
        case IXGBE_DEV_ID_82598:
        case IXGBE_DEV_ID_82598_BX:
@@ -159,13 +179,16 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
        case IXGBE_DEV_ID_X540_VF:
        case IXGBE_DEV_ID_X540_VF_HV:
                hw->mac.type = ixgbe_mac_X540_vf;
+               hw->mvals = ixgbe_mvals_X540;
                break;
        case IXGBE_DEV_ID_X540T:
        case IXGBE_DEV_ID_X540T1:
                hw->mac.type = ixgbe_mac_X540;
+               hw->mvals = ixgbe_mvals_X540;
                break;
        case IXGBE_DEV_ID_X550T:
                hw->mac.type = ixgbe_mac_X550;
+               hw->mvals = ixgbe_mvals_X550;
                break;
        case IXGBE_DEV_ID_X550EM_X_KX4:
        case IXGBE_DEV_ID_X550EM_X_KR:
@@ -173,14 +196,17 @@ s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
        case IXGBE_DEV_ID_X550EM_X_1G_T:
        case IXGBE_DEV_ID_X550EM_X_SFP:
                hw->mac.type = ixgbe_mac_X550EM_x;
+               hw->mvals = ixgbe_mvals_X550EM_x;
                break;
        case IXGBE_DEV_ID_X550_VF:
        case IXGBE_DEV_ID_X550_VF_HV:
                hw->mac.type = ixgbe_mac_X550_vf;
+               hw->mvals = ixgbe_mvals_X550;
                break;
        case IXGBE_DEV_ID_X550EM_X_VF:
        case IXGBE_DEV_ID_X550EM_X_VF_HV:
                hw->mac.type = ixgbe_mac_X550EM_x_vf;
+               hw->mvals = ixgbe_mvals_X550EM_x;
                break;
        default:
                ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 5799c21..4e689b8 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -137,6 +137,10 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X550EM_X_VF               0x15A8
 #define IXGBE_DEV_ID_X550EM_X_VF_HV            0x15A9
 
+#define IXGBE_CAT(r, m) IXGBE_##r##m
+
+#define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
+
 /* General Registers */
 #define IXGBE_CTRL             0x00000
 #define IXGBE_STATUS           0x00008
@@ -144,9 +148,11 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_ESDP             0x00020
 #define IXGBE_EODSDP           0x00028
 #define IXGBE_I2CCTL_82599     0x00028
+#define IXGBE_I2CCTL           IXGBE_I2CCTL_82599
+#define IXGBE_I2CCTL_X540      IXGBE_I2CCTL_82599
 #define IXGBE_I2CCTL_X550      0x15F5C
-#define IXGBE_I2CCTL_BY_MAC(_hw) ((((_hw)->mac.type >= ixgbe_mac_X550) ? \
-                                IXGBE_I2CCTL_X550 : IXGBE_I2CCTL_82599))
+#define IXGBE_I2CCTL_X550EM_x  IXGBE_I2CCTL_X550
+#define IXGBE_I2CCTL_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2CCTL)
 #define IXGBE_PHY_GPIO         0x00028
 #define IXGBE_MAC_GPIO         0x00030
 #define IXGBE_PHYINT_STATUS0   0x00100
@@ -181,20 +187,48 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_VPDDIAG1 0x10208
 
 /* I2CCTL Bit Masks */
-#define IXGBE_I2C_CLK_IN_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-                                       0x00004000 : 0x00000001)
-#define IXGBE_I2C_CLK_OUT_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-                                       0x00000200 : 0x00000002)
-#define IXGBE_I2C_DATA_IN_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-                                       0x00001000 : 0x00000004)
-#define IXGBE_I2C_DATA_OUT_BY_MAC(_hw)(((_hw)->mac.type) >= ixgbe_mac_X550 ? \
-                                       0x00000400 : 0x00000008)
-#define IXGBE_I2C_BB_EN_BY_MAC(hw) ((hw)->mac.type >= ixgbe_mac_X550 ? \
-                                   0x00000100 : 0)
-#define IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw) ((hw)->mac.type >= ixgbe_mac_X550 ? \
-                                          0x00000800 : 0)
-#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw) ((hw)->mac.type >= ixgbe_mac_X550 ? \
-                                         0x00002000 : 0)
+#define IXGBE_I2C_CLK_IN               0x00000001
+#define IXGBE_I2C_CLK_IN_X540          IXGBE_I2C_CLK_IN
+#define IXGBE_I2C_CLK_IN_X550          0x00004000
+#define IXGBE_I2C_CLK_IN_X550EM_x      IXGBE_I2C_CLK_IN_X550
+#define IXGBE_I2C_CLK_IN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), I2C_CLK_IN)
+
+#define IXGBE_I2C_CLK_OUT              0x00000002
+#define IXGBE_I2C_CLK_OUT_X540         IXGBE_I2C_CLK_OUT
+#define IXGBE_I2C_CLK_OUT_X550         0x00000200
+#define IXGBE_I2C_CLK_OUT_X550EM_x     IXGBE_I2C_CLK_OUT_X550
+#define IXGBE_I2C_CLK_OUT_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), I2C_CLK_OUT)
+
+#define IXGBE_I2C_DATA_IN              0x00000004
+#define IXGBE_I2C_DATA_IN_X540         IXGBE_I2C_DATA_IN
+#define IXGBE_I2C_DATA_IN_X550         0x00001000
+#define IXGBE_I2C_DATA_IN_X550EM_x     IXGBE_I2C_DATA_IN_X550
+#define IXGBE_I2C_DATA_IN_BY_MAC(_hw)  IXGBE_BY_MAC((_hw), I2C_DATA_IN)
+
+#define IXGBE_I2C_DATA_OUT             0x00000008
+#define IXGBE_I2C_DATA_OUT_X540                IXGBE_I2C_DATA_OUT
+#define IXGBE_I2C_DATA_OUT_X550                0x00000400
+#define IXGBE_I2C_DATA_OUT_X550EM_x    IXGBE_I2C_DATA_OUT_X550
+#define IXGBE_I2C_DATA_OUT_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OUT)
+
+#define IXGBE_I2C_DATA_OE_N_EN         0
+#define IXGBE_I2C_DATA_OE_N_EN_X540    IXGBE_I2C_DATA_OE_N_EN
+#define IXGBE_I2C_DATA_OE_N_EN_X550    0x00000800
+#define IXGBE_I2C_DATA_OE_N_EN_X550EM_x        IXGBE_I2C_DATA_OE_N_EN_X550
+#define IXGBE_I2C_DATA_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OE_N_EN)
+
+#define IXGBE_I2C_BB_EN                        0
+#define IXGBE_I2C_BB_EN_X540           IXGBE_I2C_BB_EN
+#define IXGBE_I2C_BB_EN_X550           0x00000100
+#define IXGBE_I2C_BB_EN_X550EM_x       IXGBE_I2C_BB_EN_X550
+
+#define IXGBE_I2C_BB_EN_BY_MAC(_hw)    IXGBE_BY_MAC((_hw), I2C_BB_EN)
+
+#define IXGBE_I2C_CLK_OE_N_EN          0
+#define IXGBE_I2C_CLK_OE_N_EN_X540     IXGBE_I2C_CLK_OE_N_EN
+#define IXGBE_I2C_CLK_OE_N_EN_X550     0x00002000
+#define IXGBE_I2C_CLK_OE_N_EN_X550EM_x IXGBE_I2C_CLK_OE_N_EN_X550
+#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN)
 #define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT     500
 
 #define IXGBE_I2C_THERMAL_SENSOR_ADDR  0xF8
@@ -1022,14 +1056,18 @@ struct ixgbe_dmac_config {
 #define IXGBE_PHYDAT_82599     0x11044
 #define IXGBE_PHYCTL_82599     0x11048
 #define IXGBE_PBACLR_82599     0x11068
-#define IXGBE_CIAA_82599       0x11088
-#define IXGBE_CIAD_82599       0x1108C
+#define IXGBE_CIAA             0x11088
+#define IXGBE_CIAD             0x1108C
+#define IXGBE_CIAA_82599       IXGBE_CIAA
+#define IXGBE_CIAD_82599       IXGBE_CIAD
+#define IXGBE_CIAA_X540                IXGBE_CIAA
+#define IXGBE_CIAD_X540                IXGBE_CIAD
 #define IXGBE_CIAA_X550                0x11508
 #define IXGBE_CIAD_X550                0x11510
-#define IXGBE_CIAA_BY_MAC(_hw) ((((_hw)->mac.type >= ixgbe_mac_X550) ? \
-                                IXGBE_CIAA_X550 : IXGBE_CIAA_82599))
-#define IXGBE_CIAD_BY_MAC(_hw) ((((_hw)->mac.type >= ixgbe_mac_X550) ? \
-                                IXGBE_CIAD_X550 : IXGBE_CIAD_82599))
+#define IXGBE_CIAA_X550EM_x    IXGBE_CIAA_X550
+#define IXGBE_CIAD_X550EM_x    IXGBE_CIAD_X550
+#define IXGBE_CIAA_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAA)
+#define IXGBE_CIAD_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAD)
 #define IXGBE_PICAUSE          0x110B0
 #define IXGBE_PIENA            0x110B8
 #define IXGBE_CDQ_MBR_82599    0x110B4
@@ -1508,12 +1546,16 @@ struct ixgbe_dmac_config {
 #define IXGBE_SDP0_GPIEN_X540  0x00000002 /* SDP0 on X540 and X550 */
 #define IXGBE_SDP1_GPIEN_X540  0x00000004 /* SDP1 on X540 and X550 */
 #define IXGBE_SDP2_GPIEN_X540  0x00000008 /* SDP2 on X540 and X550 */
-#define IXGBE_SDP0_GPIEN_BY_MAC(_hw) ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-                                     IXGBE_SDP0_GPIEN_X540 : IXGBE_SDP0_GPIEN)
-#define IXGBE_SDP1_GPIEN_BY_MAC(_hw) ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-                                     IXGBE_SDP1_GPIEN_X540 : IXGBE_SDP1_GPIEN)
-#define IXGBE_SDP2_GPIEN_BY_MAC(_hw) ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-                                     IXGBE_SDP2_GPIEN_X540 : IXGBE_SDP2_GPIEN)
+#define IXGBE_SDP0_GPIEN_X550  IXGBE_SDP0_GPIEN_X540
+#define IXGBE_SDP1_GPIEN_X550  IXGBE_SDP1_GPIEN_X540
+#define IXGBE_SDP2_GPIEN_X550  IXGBE_SDP2_GPIEN_X540
+#define IXGBE_SDP0_GPIEN_X550EM_x      IXGBE_SDP0_GPIEN_X540
+#define IXGBE_SDP1_GPIEN_X550EM_x      IXGBE_SDP1_GPIEN_X540
+#define IXGBE_SDP2_GPIEN_X550EM_x      IXGBE_SDP2_GPIEN_X540
+#define IXGBE_SDP0_GPIEN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), SDP0_GPIEN)
+#define IXGBE_SDP1_GPIEN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), SDP1_GPIEN)
+#define IXGBE_SDP2_GPIEN_BY_MAC(_hw)   IXGBE_BY_MAC((_hw), SDP2_GPIEN)
+
 #define IXGBE_GPIE_MSIX_MODE   0x00000010 /* MSI-X mode */
 #define IXGBE_GPIE_OCD         0x00000020 /* Other Clear Disable */
 #define IXGBE_GPIE_EIMEN       0x00000040 /* Immediate Interrupt Enable */
@@ -1694,15 +1736,16 @@ enum {
 #define IXGBE_EICR_GPI_SDP0_X540 0x02000000 /* Gen Purpose Interrupt on SDP0 */
 #define IXGBE_EICR_GPI_SDP1_X540 0x04000000 /* Gen Purpose Interrupt on SDP1 */
 #define IXGBE_EICR_GPI_SDP2_X540 0x08000000 /* Gen Purpose Interrupt on SDP2 */
-#define IXGBE_EICR_GPI_SDP0_BY_MAC(_hw)        ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-                                        IXGBE_EICR_GPI_SDP0_X540 : \
-                                        IXGBE_EICR_GPI_SDP0)
-#define IXGBE_EICR_GPI_SDP1_BY_MAC(_hw)        ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-                                        IXGBE_EICR_GPI_SDP1_X540 : \
-                                        IXGBE_EICR_GPI_SDP1)
-#define IXGBE_EICR_GPI_SDP2_BY_MAC(_hw)        ((_hw)->mac.type >= ixgbe_mac_X540 ? \
-                                        IXGBE_EICR_GPI_SDP2_X540 : \
-                                        IXGBE_EICR_GPI_SDP2)
+#define IXGBE_EICR_GPI_SDP0_X550       IXGBE_EICR_GPI_SDP0_X540
+#define IXGBE_EICR_GPI_SDP1_X550       IXGBE_EICR_GPI_SDP1_X540
+#define IXGBE_EICR_GPI_SDP2_X550       IXGBE_EICR_GPI_SDP2_X540
+#define IXGBE_EICR_GPI_SDP0_X550EM_x   IXGBE_EICR_GPI_SDP0_X540
+#define IXGBE_EICR_GPI_SDP1_X550EM_x   IXGBE_EICR_GPI_SDP1_X540
+#define IXGBE_EICR_GPI_SDP2_X550EM_x   IXGBE_EICR_GPI_SDP2_X540
+#define IXGBE_EICR_GPI_SDP0_BY_MAC(_hw)        IXGBE_BY_MAC((_hw), EICR_GPI_SDP0)
+#define IXGBE_EICR_GPI_SDP1_BY_MAC(_hw)        IXGBE_BY_MAC((_hw), EICR_GPI_SDP1)
+#define IXGBE_EICR_GPI_SDP2_BY_MAC(_hw)        IXGBE_BY_MAC((_hw), EICR_GPI_SDP2)
+
 #define IXGBE_EICR_PBUR                0x10000000 /* Packet Buffer Handler Error */
 #define IXGBE_EICR_DHER                0x20000000 /* Descriptor Handler Error */
 #define IXGBE_EICR_TCP_TIMER   0x40000000 /* TCP Timer */
@@ -3247,6 +3290,28 @@ union ixgbe_atr_hash_dword {
        __be32 dword;
 };
 
+#define IXGBE_MVALS_INIT(m)    \
+       IXGBE_CAT(SDP0_GPIEN, m),       \
+       IXGBE_CAT(SDP1_GPIEN, m),       \
+       IXGBE_CAT(SDP2_GPIEN, m),       \
+       IXGBE_CAT(EICR_GPI_SDP0, m),    \
+       IXGBE_CAT(EICR_GPI_SDP1, m),    \
+       IXGBE_CAT(EICR_GPI_SDP2, m),    \
+       IXGBE_CAT(CIAA, m),             \
+       IXGBE_CAT(CIAD, m),             \
+       IXGBE_CAT(I2C_CLK_IN, m),       \
+       IXGBE_CAT(I2C_CLK_OUT, m),      \
+       IXGBE_CAT(I2C_DATA_IN, m),      \
+       IXGBE_CAT(I2C_DATA_OUT, m),     \
+       IXGBE_CAT(I2C_DATA_OE_N_EN, m), \
+       IXGBE_CAT(I2C_BB_EN, m),        \
+       IXGBE_CAT(I2C_CLK_OE_N_EN, m),  \
+       IXGBE_CAT(I2CCTL, m)
+
+enum ixgbe_mvals {
+       IXGBE_MVALS_INIT(_IDX),
+       IXGBE_MVALS_IDX_LIMIT
+};
 
 /*
  * Unavailable: The FCoE Boot Option ROM is not present in the flash.
@@ -3779,6 +3844,7 @@ struct ixgbe_hw {
        struct ixgbe_eeprom_info eeprom;
        struct ixgbe_bus_info bus;
        struct ixgbe_mbx_info mbx;
+       const u32 *mvals;
        u16 device_id;
        u16 vendor_id;
        u16 subsystem_device_id;