event/octeontx2: add SSO dual GWS HW device operations

Add SSO dual workslot mode GWS HW device operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile
index de3fb9a..01c1a98 100644 (file)
--- a/drivers/event/octeontx2/Makefile
+++ b/drivers/event/octeontx2/Makefile
@@ -33,6 +33,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_irq.c

diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 1d2080b..c2a5f3e 100644 (file)
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -3,6 +3,7 @@
 #
 
 sources = files('otx2_worker.c',
+               'otx2_worker_dual.c',
                'otx2_evdev.c',
                'otx2_evdev_irq.c',
                )

diff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c
new file mode 100644 (file)
index 0000000..f762436
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_worker_dual.c
@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_worker_dual.h"
+#include "otx2_worker.h"

diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h
new file mode 100644 (file)
index 0000000..d8453d1
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_worker_dual.h
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_WORKER_DUAL_H__
+#define __OTX2_WORKER_DUAL_H__
+
+#include <rte_branch_prediction.h>
+#include <rte_common.h>
+
+#include <otx2_common.h>
+#include "otx2_evdev.h"
+
+/* SSO Operations */
+static __rte_always_inline uint16_t
+otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
+                         struct otx2_ssogws_state *ws_pair,
+                         struct rte_event *ev)
+{
+       const uint64_t set_gw = BIT_ULL(16) | 1;
+       union otx2_sso_event event;
+       uint64_t get_work1;
+
+#ifdef RTE_ARCH_ARM64
+       asm volatile(
+                       "        ldr %[tag], [%[tag_loc]]    \n"
+                       "        ldr %[wqp], [%[wqp_loc]]    \n"
+                       "        tbz %[tag], 63, done%=      \n"
+                       "        sevl                        \n"
+                       "rty%=:  wfe                         \n"
+                       "        ldr %[tag], [%[tag_loc]]    \n"
+                       "        ldr %[wqp], [%[wqp_loc]]    \n"
+                       "        tbnz %[tag], 63, rty%=      \n"
+                       "done%=: str %[gw], [%[pong]]        \n"
+                       "        dmb ld                      \n"
+                       "        prfm pldl1keep, [%[wqp]]    \n"
+                       : [tag] "=&r" (event.get_work0),
+                         [wqp] "=&r" (get_work1)
+                       : [tag_loc] "r" (ws->tag_op),
+                         [wqp_loc] "r" (ws->wqp_op),
+                         [gw] "r" (set_gw),
+                         [pong] "r" (ws_pair->getwrk_op)
+                       );
+#else
+       event.get_work0 = otx2_read64(ws->tag_op);
+       while ((BIT_ULL(63)) & event.get_work0)
+               event.get_work0 = otx2_read64(ws->tag_op);
+       get_work1 = otx2_read64(ws->wqp_op);
+       otx2_write64(set_gw, ws_pair->getwrk_op);
+
+       rte_prefetch0((const void *)get_work1);
+#endif
+       event.get_work0 = (event.get_work0 & (0x3ull << 32)) << 6 |
+               (event.get_work0 & (0x3FFull << 36)) << 4 |
+               (event.get_work0 & 0xffffffff);
+       ws->cur_tt = event.sched_type;
+       ws->cur_grp = event.queue_id;
+
+       ev->event = event.get_work0;
+       ev->u64 = get_work1;
+
+       return !!get_work1;
+}
+
+static __rte_always_inline void
+otx2_ssogws_dual_add_work(struct otx2_ssogws_dual *ws, const uint64_t event_ptr,
+                         const uint32_t tag, const uint8_t new_tt,
+                         const uint16_t grp)
+{
+       uint64_t add_work0;
+
+       add_work0 = tag | ((uint64_t)(new_tt) << 32);
+       otx2_store_pair(add_work0, event_ptr, ws->grps_base[grp]);
+}
+
+#endif