#define IXGBE_HI_FLASH_ERASE_TIMEOUT 1000 /* Process Erase command limit */
#define IXGBE_HI_FLASH_UPDATE_TIMEOUT 5000 /* Process Update command limit */
#define IXGBE_HI_FLASH_APPLY_TIMEOUT 0 /* Process Apply command limit */
+#define IXGBE_HI_PHY_MGMT_REQ_TIMEOUT 2000 /* Wait up to 2 seconds */
/* CEM Support */
#define FW_CEM_HDR_LEN 0x4
#define FW_MAX_READ_BUFFER_SIZE 1024
#define FW_DISABLE_RXEN_CMD 0xDE
#define FW_DISABLE_RXEN_LEN 0x1
+#define FW_PHY_MGMT_REQ_CMD 0x20
/* Host Interface Command Structures */
struct ixgbe_hic_hdr {
*/
s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
{
+ struct ixgbe_hic_hdr fw_cmd;
ixgbe_link_speed link_speed;
s32 status;
u32 ctrl = 0;
DEBUGFUNC("ixgbe_reset_hw_X550em");
+ fw_cmd.cmd = FW_PHY_MGMT_REQ_CMD;
+ fw_cmd.buf_len = 0;
+ fw_cmd.cmd_or_resp.cmd_resv = 0;
+ fw_cmd.checksum = FW_DEFAULT_CHECKSUM;
+ status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
+ sizeof(fw_cmd),
+ IXGBE_HI_PHY_MGMT_REQ_TIMEOUT,
+ true);
+ if (status)
+ ERROR_REPORT2(IXGBE_ERROR_CAUTION,
+ "PHY mgmt command failed with %d\n", status);
+ else if (fw_cmd.cmd_or_resp.ret_status != FW_CEM_RESP_STATUS_SUCCESS)
+ ERROR_REPORT2(IXGBE_ERROR_CAUTION,
+ "PHY mgmt command returned %d\n",
+ fw_cmd.cmd_or_resp.ret_status);
+
/* Call adapter stop to disable Tx/Rx and clear interrupts */
status = hw->mac.ops.stop_adapter(hw);
if (status != IXGBE_SUCCESS)