pci: mmap ioports on non-x86 Linux

On PPC64, the ioports are mapped in memory. Implement the missing part
of ioport API for PPC64 when using uio. This may also work on other
architectures but it has not been tested.

Signed-off-by: David Marchand <david.marchand@6wind.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>

diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/common/include/rte_pci.h
index b9072eb..fa74962 100644 (file)
--- a/lib/librte_eal/common/include/rte_pci.h
+++ b/lib/librte_eal/common/include/rte_pci.h
@@ -105,9 +105,6 @@ const char *pci_get_sysfs_path(void);
 /** Nb. of values in PCI resource format. */
 #define PCI_RESOURCE_FMT_NVAL 3
 
-/** IO resource type: memory address space */
-#define IORESOURCE_MEM        0x00000200
-
 /**
  * A structure describing a PCI resource.
  */
@@ -522,6 +519,7 @@ int rte_eal_pci_write_config(const struct rte_pci_device *device,
 struct rte_pci_ioport {
        struct rte_pci_device *dev;
        uint64_t base;
+       uint64_t len; /* only filled for memory mapped ports */
 };
 
 /**

diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c
index bb5f513..f9c3efd 100644 (file)
--- a/lib/librte_eal/linuxapp/eal/eal_pci.c
+++ b/lib/librte_eal/linuxapp/eal/eal_pci.c
@@ -193,7 +193,7 @@ pci_find_max_end_va(void)
 /* parse one line of the "resource" sysfs file (note that the 'line'
  * string is modified)
  */
-static int
+int
 pci_parse_one_sysfs_resource(char *line, size_t len, uint64_t *phys_addr,
        uint64_t *end_addr, uint64_t *flags)
 {

diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_init.h b/lib/librte_eal/linuxapp/eal/eal_pci_init.h
index 7011753..f72a254 100644 (file)
--- a/lib/librte_eal/linuxapp/eal/eal_pci_init.h
+++ b/lib/librte_eal/linuxapp/eal/eal_pci_init.h
@@ -36,12 +36,22 @@
 
 #include "eal_vfio.h"
 
+/** IO resource type: */
+#define IORESOURCE_IO         0x00000100
+#define IORESOURCE_MEM        0x00000200
+
 /*
  * Helper function to map PCI resources right after hugepages in virtual memory
  */
 extern void *pci_map_addr;
 void *pci_find_max_end_va(void);
 
+/* parse one line of the "resource" sysfs file (note that the 'line'
+ * string is modified)
+ */
+int pci_parse_one_sysfs_resource(char *line, size_t len, uint64_t *phys_addr,
+       uint64_t *end_addr, uint64_t *flags);
+
 int pci_uio_alloc_resource(struct rte_pci_device *dev,
                struct mapped_pci_resource **uio_res);
 void pci_uio_free_resource(struct rte_pci_device *dev,

diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
index 82ba93b..1786b75 100644 (file)
--- a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
+++ b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c
@@ -35,6 +35,7 @@
 #include <unistd.h>
 #include <fcntl.h>
 #include <dirent.h>
+#include <inttypes.h>
 #include <sys/stat.h>
 #include <sys/mman.h>
 #include <linux/pci_regs.h>
@@ -369,11 +370,11 @@ error:
        return -1;
 }
 
+#if defined(RTE_ARCH_X86)
 int
 pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
                   struct rte_pci_ioport *p)
 {
-#if defined(RTE_ARCH_X86)
        char dirname[PATH_MAX];
        char filename[PATH_MAX];
        int uio_num;
@@ -412,81 +413,154 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
        RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", start);
 
        p->base = start;
+       p->len = 0;
        return 0;
+}
 #else
-       RTE_SET_USED(dev);
-       RTE_SET_USED(bar);
-       RTE_SET_USED(p);
+int
+pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
+                  struct rte_pci_ioport *p)
+{
+       FILE *f;
+       char buf[BUFSIZ];
+       char filename[PATH_MAX];
+       uint64_t phys_addr, end_addr, flags;
+       int fd, i;
+       void *addr;
+
+       /* open and read addresses of the corresponding resource in sysfs */
+       snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource",
+               pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus,
+               dev->addr.devid, dev->addr.function);
+       f = fopen(filename, "r");
+       if (f == NULL) {
+               RTE_LOG(ERR, EAL, "Cannot open sysfs resource: %s\n",
+                       strerror(errno));
+               return -1;
+       }
+       for (i = 0; i < bar + 1; i++) {
+               if (fgets(buf, sizeof(buf), f) == NULL) {
+                       RTE_LOG(ERR, EAL, "Cannot read sysfs resource\n");
+                       goto error;
+               }
+       }
+       if (pci_parse_one_sysfs_resource(buf, sizeof(buf), &phys_addr,
+                       &end_addr, &flags) < 0)
+               goto error;
+       if ((flags & IORESOURCE_IO) == 0) {
+               RTE_LOG(ERR, EAL, "BAR %d is not an IO resource\n", bar);
+               goto error;
+       }
+       snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource%d",
+               pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus,
+               dev->addr.devid, dev->addr.function, bar);
+
+       /* mmap the pci resource */
+       fd = open(filename, O_RDWR);
+       if (fd < 0) {
+               RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", filename,
+                       strerror(errno));
+               goto error;
+       }
+       addr = mmap(NULL, end_addr + 1, PROT_READ | PROT_WRITE,
+               MAP_SHARED, fd, 0);
+       close(fd);
+       if (addr == MAP_FAILED) {
+               RTE_LOG(ERR, EAL, "Cannot mmap IO port resource: %s\n",
+                       strerror(errno));
+               goto error;
+       }
+
+       /* strangely, the base address is mmap addr + phys_addr */
+       p->base = (uintptr_t)addr + phys_addr;
+       p->len = end_addr + 1;
+       RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%"PRIx64"\n", p->base);
+       fclose(f);
+
+       return 0;
+
+error:
+       fclose(f);
        return -1;
-#endif
 }
+#endif
 
 void
 pci_uio_ioport_read(struct rte_pci_ioport *p,
                    void *data, size_t len, off_t offset)
 {
-#if defined(RTE_ARCH_X86)
        uint8_t *d;
        int size;
-       unsigned short reg = p->base + offset;
+       uintptr_t reg = p->base + offset;
 
        for (d = data; len > 0; d += size, reg += size, len -= size) {
                if (len >= 4) {
                        size = 4;
+#if defined(RTE_ARCH_X86)
                        *(uint32_t *)d = inl(reg);
+#else
+                       *(uint32_t *)d = *(volatile uint32_t *)reg;
+#endif
                } else if (len >= 2) {
                        size = 2;
+#if defined(RTE_ARCH_X86)
                        *(uint16_t *)d = inw(reg);
+#else
+                       *(uint16_t *)d = *(volatile uint16_t *)reg;
+#endif
                } else {
                        size = 1;
+#if defined(RTE_ARCH_X86)
                        *d = inb(reg);
-               }
-       }
 #else
-       RTE_SET_USED(p);
-       RTE_SET_USED(data);
-       RTE_SET_USED(len);
-       RTE_SET_USED(offset);
+                       *d = *(volatile uint8_t *)reg;
 #endif
+               }
+       }
 }
 
 void
 pci_uio_ioport_write(struct rte_pci_ioport *p,
                     const void *data, size_t len, off_t offset)
 {
-#if defined(RTE_ARCH_X86)
        const uint8_t *s;
        int size;
-       unsigned short reg = p->base + offset;
+       uintptr_t reg = p->base + offset;
 
        for (s = data; len > 0; s += size, reg += size, len -= size) {
                if (len >= 4) {
                        size = 4;
+#if defined(RTE_ARCH_X86)
                        outl_p(*(const uint32_t *)s, reg);
+#else
+                       *(volatile uint32_t *)reg = *(const uint32_t *)s;
+#endif
                } else if (len >= 2) {
                        size = 2;
+#if defined(RTE_ARCH_X86)
                        outw_p(*(const uint16_t *)s, reg);
+#else
+                       *(volatile uint16_t *)reg = *(const uint16_t *)s;
+#endif
                } else {
                        size = 1;
+#if defined(RTE_ARCH_X86)
                        outb_p(*s, reg);
-               }
-       }
 #else
-       RTE_SET_USED(p);
-       RTE_SET_USED(data);
-       RTE_SET_USED(len);
-       RTE_SET_USED(offset);
+                       *(volatile uint8_t *)reg = *s;
 #endif
+               }
+       }
 }
 
 int
 pci_uio_ioport_unmap(struct rte_pci_ioport *p)
 {
-       RTE_SET_USED(p);
 #if defined(RTE_ARCH_X86)
+       RTE_SET_USED(p);
        /* FIXME close intr fd ? */
        return 0;
 #else
-       return -1;
+       return munmap((void *)(uintptr_t)p->base, p->len);
 #endif
 }