event/cnxk: reduce workslot memory consumption

SSO group base addresses are always are always contiguous we
need not store all the base addresses in workslot memory, instead
just store the base address and compute the group address offset
when required.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 243187576605c558bd7879d906225ee64224580b..c5a8c1ae8f7c69314730f7ffd7a13bbaa7123784 100644 (file)
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -91,14 +91,13 @@ cn10k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link)
 }
 
 static void
-cn10k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
+cn10k_sso_hws_setup(void *arg, void *hws, uintptr_t grp_base)
 {
        struct cnxk_sso_evdev *dev = arg;
        struct cn10k_sso_hws *ws = hws;
        uint64_t val;
 
-       rte_memcpy(ws->grps_base, grps_base,
-                  sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
+       ws->grp_base = grp_base;
        ws->fc_mem = (uint64_t *)dev->fc_iova;
        ws->xaq_lmt = dev->xaq_lmt;
 

diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h
index 657ab91ac8a1ebbb0c470cd84873a9991990bb54..f8331e88d7c83a84790adbdb341b27da7d643011 100644 (file)
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -30,7 +30,8 @@ cn10k_sso_hws_new_event(struct cn10k_sso_hws *ws, const struct rte_event *ev)
        if (ws->xaq_lmt <= *ws->fc_mem)
                return 0;
 
-       cnxk_sso_hws_add_work(event_ptr, tag, new_tt, ws->grps_base[grp]);
+       cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
+                             ws->grp_base + (grp << 12));
        return 1;
 }
 

diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c
index c36433602318c77fba0416bd413139309255ae77..6e2787252e0f6582e5aae4e22ed7d2a6c345b571 100644 (file)
--- a/drivers/event/cnxk/cn9k_eventdev.c
+++ b/drivers/event/cnxk/cn9k_eventdev.c
@@ -87,7 +87,7 @@ cn9k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link)
 }
 
 static void
-cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
+cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t grp_base)
 {
        struct cnxk_sso_evdev *dev = arg;
        struct cn9k_sso_hws_dual *dws;
@@ -98,8 +98,7 @@ cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
        val = NSEC2USEC(dev->deq_tmo_ns) - 1;
        if (dev->dual_ws) {
                dws = hws;
-               rte_memcpy(dws->grps_base, grps_base,
-                          sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
+               dws->grp_base = grp_base;
                dws->fc_mem = (uint64_t *)dev->fc_iova;
                dws->xaq_lmt = dev->xaq_lmt;
 
@@ -107,8 +106,7 @@ cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
                plt_write64(val, dws->base[1] + SSOW_LF_GWS_NW_TIM);
        } else {
                ws = hws;
-               rte_memcpy(ws->grps_base, grps_base,
-                          sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
+               ws->grp_base = grp_base;
                ws->fc_mem = (uint64_t *)dev->fc_iova;
                ws->xaq_lmt = dev->xaq_lmt;
 

diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h
index d536c0a8ca788efdf56809a795e4ff4ae4533699..aaf612e814407e0d6877a2ff8a9ea0ab077bf468 100644 (file)
--- a/drivers/event/cnxk/cn9k_worker.h
+++ b/drivers/event/cnxk/cn9k_worker.h
@@ -31,7 +31,8 @@ cn9k_sso_hws_new_event(struct cn9k_sso_hws *ws, const struct rte_event *ev)
        if (ws->xaq_lmt <= *ws->fc_mem)
                return 0;
 
-       cnxk_sso_hws_add_work(event_ptr, tag, new_tt, ws->grps_base[grp]);
+       cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
+                             ws->grp_base + (grp << 12));
        return 1;
 }
 
@@ -108,7 +109,8 @@ cn9k_sso_hws_dual_new_event(struct cn9k_sso_hws_dual *dws,
        if (dws->xaq_lmt <= *dws->fc_mem)
                return 0;
 
-       cnxk_sso_hws_add_work(event_ptr, tag, new_tt, dws->grps_base[grp]);
+       cnxk_sso_hws_add_work(event_ptr, tag, new_tt,
+                             dws->grp_base + (grp << 12));
        return 1;
 }
 

diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c
index 2b9235687a24cc0702a377400bda732e478b576e..50d5c351bc6f8c98682e0270a50532f92d56c71c 100644 (file)
--- a/drivers/event/cnxk/cnxk_eventdev.c
+++ b/drivers/event/cnxk/cnxk_eventdev.c
@@ -330,8 +330,7 @@ cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
                    cnxk_sso_hws_setup_t hws_setup_fn)
 {
        struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
-       uintptr_t grps_base[CNXK_SSO_MAX_HWGRP] = {0};
-       uint16_t q;
+       uintptr_t grp_base = 0;
 
        plt_sso_dbg("Port=%d", port_id);
        if (event_dev->data->ports[port_id] == NULL) {
@@ -339,15 +338,13 @@ cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
                return -EINVAL;
        }
 
-       for (q = 0; q < dev->nb_event_queues; q++) {
-               grps_base[q] = roc_sso_hwgrp_base_get(&dev->sso, q);
-               if (grps_base[q] == 0) {
-                       plt_err("Failed to get grp[%d] base addr", q);
-                       return -EINVAL;
-               }
+       grp_base = roc_sso_hwgrp_base_get(&dev->sso, 0);
+       if (grp_base == 0) {
+               plt_err("Failed to get grp base addr");
+               return -EINVAL;
        }
 
-       hws_setup_fn(dev, event_dev->data->ports[port_id], grps_base);
+       hws_setup_fn(dev, event_dev->data->ports[port_id], grp_base);
        plt_sso_dbg("Port=%d ws=%p", port_id, event_dev->data->ports[port_id]);
        rte_mb();
 

diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
index 957dcf04a46ddbb8197ec4a3cdf3a7f7daa00d17..d9f52d03e000ec8c4af0c253501b064c27c11dcd 100644 (file)
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -61,7 +61,7 @@
        } while (0)
 
 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
-typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
+typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t grp_base);
 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
                               uint16_t nb_link);
@@ -129,7 +129,7 @@ struct cn10k_sso_hws {
        /* Add Work Fastpath data */
        uint64_t xaq_lmt __rte_cache_aligned;
        uint64_t *fc_mem;
-       uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
+       uintptr_t grp_base;
        /* Tx Fastpath data */
        uint64_t tx_base __rte_cache_aligned;
        uintptr_t lmt_base;
@@ -157,7 +157,7 @@ struct cn9k_sso_hws {
        /* Add Work Fastpath data */
        uint64_t xaq_lmt __rte_cache_aligned;
        uint64_t *fc_mem;
-       uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
+       uintptr_t grp_base;
        /* Tx Fastpath data */
        uint64_t base __rte_cache_aligned;
        uint8_t tx_adptr_data[];
@@ -179,7 +179,7 @@ struct cn9k_sso_hws_dual {
        /* Add Work Fastpath data */
        uint64_t xaq_lmt __rte_cache_aligned;
        uint64_t *fc_mem;
-       uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
+       uintptr_t grp_base;
        /* Tx Fastpath data */
        uint64_t base[2] __rte_cache_aligned;
        uint8_t tx_adptr_data[];