net/sfc/base: report no Tx checksum FW subvariant support
authorAndrew Rybchenko <arybchenko@solarflare.com>
Wed, 4 Apr 2018 14:23:55 +0000 (15:23 +0100)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 13 Apr 2018 22:41:44 +0000 (00:41 +0200)
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
drivers/net/sfc/base/ef10_nic.c
drivers/net/sfc/base/efx.h
drivers/net/sfc/base/siena_nic.c

index 42c37dd..05db363 100644 (file)
@@ -1108,6 +1108,12 @@ ef10_get_datapath_caps(
        else
                encp->enc_rx_var_packed_stream_supported = B_FALSE;
 
+       /* Check if the firmware supports FW subvariant w/o Tx checksumming */
+       if (CAP_FLAGS2(req, FW_SUBVARIANT_NO_TX_CSUM))
+               encp->enc_fw_subvariant_no_tx_csum_supported = B_TRUE;
+       else
+               encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE;
+
        /* Check if the firmware supports set mac with running filters */
        if (CAP_FLAGS1(req, VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED))
                encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
index fd9f059..e334b96 100644 (file)
@@ -1259,6 +1259,7 @@ typedef struct efx_nic_cfg_s {
        boolean_t               enc_init_evq_v2_supported;
        boolean_t               enc_rx_packed_stream_supported;
        boolean_t               enc_rx_var_packed_stream_supported;
+       boolean_t               enc_fw_subvariant_no_tx_csum_supported;
        boolean_t               enc_pm_and_rxdp_counters;
        boolean_t               enc_mac_stats_40g_tx_size_bins;
        uint32_t                enc_tunnel_encapsulations_supported;
index f518a54..6e57de4 100644 (file)
@@ -149,6 +149,7 @@ siena_board_cfg(
        encp->enc_allow_set_mac_with_installed_filters = B_TRUE;
        encp->enc_rx_packed_stream_supported = B_FALSE;
        encp->enc_rx_var_packed_stream_supported = B_FALSE;
+       encp->enc_fw_subvariant_no_tx_csum_supported = B_FALSE;
 
        /* Siena supports two 10G ports, and 8 lanes of PCIe Gen2 */
        encp->enc_required_pcie_bandwidth_mbps = 2 * 10000;