net/e1000/base: add missing register defines

Added defines for the EEC, SHADOWINF and FLFWUPDATE registers needed for
the nvmupd_validate_offset function to correctly validate the NVM update
offset.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 9edd3c5..4af9e17 100644 (file)
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -140,6 +140,8 @@
 #define E1000_EMIDATA  0x11     /* Extended Memory Indirect Data */
 /* Shadow Ram Write Register - RW */
 #define E1000_SRWR             0x12018
+#define E1000_EEC_REG          0x12010
+
 #define E1000_I210_FLMNGCTL    0x12038
 #define E1000_I210_FLMNGDATA   0x1203C
 #define E1000_I210_FLMNGCNT    0x12040
@@ -150,6 +152,9 @@
 
 #define E1000_I210_FLA         0x1201C
 
+#define E1000_SHADOWINF                0x12068
+#define E1000_FLFWUPDATE       0x12108
+
 #define E1000_INVM_DATA_REG(_n)        (0x12120 + 4*(_n))
 #define E1000_INVM_SIZE                64 /* Number of INVM Data Registers */