crypto/qat: add common header
authorFiona Trahe <fiona.trahe@intel.com>
Wed, 13 Jun 2018 12:13:45 +0000 (14:13 +0200)
committerPablo de Lara <pablo.de.lara.guarch@intel.com>
Wed, 27 Jun 2018 23:25:33 +0000 (01:25 +0200)
This commit adds qat_common.h header file.
Following objects were moved to it:

qat_algs.h =>. qat_common.h
- struct qat_alg_buf
- struct qat_alg_buf_list
- struct qat_crypto_op_cookie
- QAT_SGL_MAX_NUMBER
qat_crypto.h => qat_common.h
- CRYPTODEV_NAME_QAT_SYM_PMD

Signed-off-by: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
drivers/crypto/qat/qat_adf/qat_algs.h
drivers/crypto/qat/qat_common.h [new file with mode: 0644]
drivers/crypto/qat/qat_crypto.h

index 88bd5f0..6c49c65 100644 (file)
                                        ICP_QAT_HW_CIPHER_KEY_CONVERT, \
                                        ICP_QAT_HW_CIPHER_DECRYPT)
 
-struct qat_alg_buf {
-       uint32_t len;
-       uint32_t resrvd;
-       uint64_t addr;
-} __rte_packed;
-
 enum qat_crypto_proto_flag {
        QAT_CRYPTO_PROTO_FLAG_NONE = 0,
        QAT_CRYPTO_PROTO_FLAG_CCM = 1,
@@ -46,25 +40,6 @@ enum qat_crypto_proto_flag {
        QAT_CRYPTO_PROTO_FLAG_ZUC = 4
 };
 
-/*
- * Maximum number of SGL entries
- */
-#define QAT_SGL_MAX_NUMBER     16
-
-struct qat_alg_buf_list {
-       uint64_t resrvd;
-       uint32_t num_bufs;
-       uint32_t num_mapped_bufs;
-       struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
-} __rte_packed __rte_cache_aligned;
-
-struct qat_crypto_op_cookie {
-       struct qat_alg_buf_list qat_sgl_list_src;
-       struct qat_alg_buf_list qat_sgl_list_dst;
-       rte_iova_t qat_sgl_src_phys_addr;
-       rte_iova_t qat_sgl_dst_phys_addr;
-};
-
 /* Common content descriptor */
 struct qat_alg_cd {
        struct icp_qat_hw_cipher_algo_blk cipher;
diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
new file mode 100644 (file)
index 0000000..293b6f7
--- /dev/null
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Intel Corporation
+ */
+#ifndef _QAT_COMMON_H_
+#define _QAT_COMMON_H_
+
+#include <stdint.h>
+
+/**< Intel(R) QAT Symmetric Crypto PMD device name */
+#define CRYPTODEV_NAME_QAT_SYM_PMD     crypto_qat
+
+/*
+ * Maximum number of SGL entries
+ */
+#define QAT_SGL_MAX_NUMBER     16
+
+/* Intel(R) QuickAssist Technology device generation is enumerated
+ * from one according to the generation of the device
+ */
+
+enum qat_device_gen {
+       QAT_GEN1 = 1,
+       QAT_GEN2,
+};
+
+/**< Common struct for scatter-gather list operations */
+struct qat_alg_buf {
+       uint32_t len;
+       uint32_t resrvd;
+       uint64_t addr;
+} __rte_packed;
+
+struct qat_alg_buf_list {
+       uint64_t resrvd;
+       uint32_t num_bufs;
+       uint32_t num_mapped_bufs;
+       struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER];
+} __rte_packed __rte_cache_aligned;
+
+struct qat_crypto_op_cookie {
+       struct qat_alg_buf_list qat_sgl_list_src;
+       struct qat_alg_buf_list qat_sgl_list_dst;
+       phys_addr_t qat_sgl_src_phys_addr;
+       phys_addr_t qat_sgl_dst_phys_addr;
+};
+
+#endif /* _QAT_QAT_COMMON_H_ */
index 281a142..5190d25 100644 (file)
@@ -8,11 +8,9 @@
 #include <rte_cryptodev_pmd.h>
 #include <rte_memzone.h>
 
+#include "qat_common.h"
 #include "qat_crypto_capabilities.h"
 
-#define CRYPTODEV_NAME_QAT_SYM_PMD     crypto_qat
-/**< Intel QAT Symmetric Crypto PMD device name */
-
 /*
  * This macro rounds up a number to a be a multiple of
  * the alignment when the alignment is a power of 2
 
 struct qat_session;
 
-enum qat_device_gen {
-       QAT_GEN1 = 1,
-       QAT_GEN2,
-};
-
 /**
  * Structure associated with each queue.
  */