common/mlx5: get DevX capability for max RQT size
authorMatan Azrad <matan@mellanox.com>
Wed, 29 Jan 2020 12:38:45 +0000 (12:38 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 5 Feb 2020 08:51:20 +0000 (09:51 +0100)
In order to allow RQT size configuration which is limited to the
correct maximum value, add log_max_rqt_size for DevX capability
structure.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h

index 1d3a729..b0803ac 100644 (file)
@@ -436,6 +436,8 @@ mlx5_devx_cmd_query_hca_attr(struct ibv_context *ctx,
                        MLX5_GET(cmd_hca_cap, hcattr, flow_counter_bulk_alloc);
        attr->flow_counters_dump = MLX5_GET(cmd_hca_cap, hcattr,
                                            flow_counters_dump);
+       attr->log_max_rqt_size = MLX5_GET(cmd_hca_cap, hcattr,
+                                         log_max_rqt_size);
        attr->eswitch_manager = MLX5_GET(cmd_hca_cap, hcattr, eswitch_manager);
        attr->hairpin = MLX5_GET(cmd_hca_cap, hcattr, hairpin);
        attr->log_max_hairpin_queues = MLX5_GET(cmd_hca_cap, hcattr,
index b99c54b..6912dc6 100644 (file)
@@ -78,6 +78,7 @@ struct mlx5_hca_vdpa_attr {
 struct mlx5_hca_attr {
        uint32_t eswitch_manager:1;
        uint32_t flow_counters_dump:1;
+       uint32_t log_max_rqt_size:5;
        uint8_t flow_counter_bulk_alloc_bitmap;
        uint32_t eth_net_offloads:1;
        uint32_t eth_virt:1;