#define V_HASHEN(x) ((x) << S_HASHEN)
#define F_HASHEN V_HASHEN(1U)
+#define A_LE_DB_RSP_CODE_0 0x19c74
+
+#define S_TCAM_ACTV_HIT 0
+#define M_TCAM_ACTV_HIT 0x1fU
+#define G_TCAM_ACTV_HIT(x) (((x) >> S_TCAM_ACTV_HIT) & M_TCAM_ACTV_HIT)
+
+#define A_LE_DB_RSP_CODE_1 0x19c78
+
+#define S_HASH_ACTV_HIT 25
+#define M_HASH_ACTV_HIT 0x1fU
+#define G_HASH_ACTV_HIT(x) (((x) >> S_HASH_ACTV_HIT) & M_HASH_ACTV_HIT)
+
#define A_LE_DB_TID_HASHBASE 0x19df8
#define LE_3_DB_HASH_MASK_GEN_IPV4_T6_A 0x19eac
__be16 niccaps;
__be16 toecaps;
__be16 rdmacaps;
- __be16 r4;
+ __be16 cryptocaps;
__be16 iscsicaps;
__be16 fcoecaps;
__be32 cfcsum;
FW_PARAMS_PARAM_DEV_ULPTX_MEMWRITE_DSGL = 0x17,
FW_PARAMS_PARAM_DEV_FILTER2_WR = 0x1D,
FW_PARAMS_PARAM_DEV_OPAQUE_VIID_SMT_EXTN = 0x27,
+ FW_PARAMS_PARAM_DEV_HASHFILTER_WITH_OFLD = 0x28,
FW_PARAMS_PARAM_DEV_FILTER = 0x2E,
};
#include "clip_tbl.h"
#include "l2t.h"
#include "smt.h"
+#include "cxgbe_pfvf.h"
/**
* Initialize Hash Filters
*/
int cxgbe_init_hash_filter(struct adapter *adap)
{
- unsigned int n_user_filters;
- unsigned int user_filter_perc;
+ unsigned int user_filter_perc, n_user_filters;
+ u32 param, val;
int ret;
- u32 params[7], val[7];
-#define FW_PARAM_DEV(param) \
- (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \
- V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param))
+ if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
+ val = t4_read_reg(adap, A_LE_DB_RSP_CODE_0);
+ if (G_TCAM_ACTV_HIT(val) != 4) {
+ adap->params.hash_filter = 0;
+ return 0;
+ }
-#define FW_PARAM_PFVF(param) \
- (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \
- V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param) | \
- V_FW_PARAMS_PARAM_Y(0) | \
- V_FW_PARAMS_PARAM_Z(0))
+ val = t4_read_reg(adap, A_LE_DB_RSP_CODE_1);
+ if (G_HASH_ACTV_HIT(val) != 4) {
+ adap->params.hash_filter = 0;
+ return 0;
+ }
+ }
- params[0] = FW_PARAM_DEV(NTID);
+ param = CXGBE_FW_PARAM_DEV(NTID);
ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1,
- params, val);
+ ¶m, &val);
if (ret < 0)
return ret;
- adap->tids.ntids = val[0];
+ adap->tids.ntids = val;
adap->tids.natids = min(adap->tids.ntids / 2, MAX_ATIDS);
user_filter_perc = 100;
*/
static int adap_init0_config(struct adapter *adapter, int reset)
{
+ u32 finiver, finicsum, cfcsum, param, val;
struct fw_caps_config_cmd caps_cmd;
unsigned long mtype = 0, maddr = 0;
- u32 finiver, finicsum, cfcsum;
- int ret;
- int config_issued = 0;
- int cfg_addr;
+ u8 config_issued = 0;
char config_name[20];
+ int cfg_addr, ret;
/*
* Reset device if necessary.
mtype = FW_MEMTYPE_CF_FLASH;
maddr = cfg_addr;
+ /* Enable HASH filter region when support is available. */
+ val = 1;
+ param = CXGBE_FW_PARAM_DEV(HASHFILTER_WITH_OFLD);
+ t4_set_params(adapter, adapter->mbox, adapter->pf, 0, 1,
+ ¶m, &val);
+
/*
* Issue a Capability Configuration command to the firmware to get it
* to parse the Configuration File. We don't use t4_fw_config_file()
caps_cmd.iscsicaps = 0;
caps_cmd.rdmacaps = 0;
caps_cmd.fcoecaps = 0;
+ caps_cmd.cryptocaps = 0;
/*
* And now tell the firmware to use the configuration we just loaded.