hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_PTP_B, 1);
if (hns3_get_bit(caps, HNS3_CAPS_TX_PUSH_B))
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_TX_PUSH_B, 1);
- /*
- * Currently, the query of link status and link info on copper ports
- * are not supported. So it is necessary for driver to set the copper
- * capability bit to zero when the firmware supports the configuration
- * of the PHY.
- */
if (hns3_get_bit(caps, HNS3_CAPS_PHY_IMP_B))
- hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_COPPER_B, 0);
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_COPPER_B, 1);
if (hns3_get_bit(caps, HNS3_CAPS_TQP_TXRX_INDEP_B))
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_INDEP_TXRX_B, 1);
if (hns3_get_bit(caps, HNS3_CAPS_STASH_B))
/* Firmware stats command */
HNS3_OPC_FIRMWARE_COMPAT_CFG = 0x701A,
+ /* Firmware control phy command */
+ HNS3_OPC_PHY_PARAM_CFG = 0x7025,
/* SFP command */
HNS3_OPC_GET_SFP_EEPROM = 0x7100,
#define HNS3_LINK_EVENT_REPORT_EN_B 0
#define HNS3_NCSI_ERROR_REPORT_EN_B 1
+#define HNS3_FIRMWARE_PHY_DRIVER_EN_B 2
struct hns3_firmware_compat_cmd {
uint32_t compat;
uint8_t rsv[20];
};
+/* Bitmap flags in supported, advertising and lp_advertising */
+#define HNS3_PHY_LINK_SPEED_10M_HD_BIT BIT(0)
+#define HNS3_PHY_LINK_SPEED_10M_BIT BIT(1)
+#define HNS3_PHY_LINK_SPEED_100M_HD_BIT BIT(2)
+#define HNS3_PHY_LINK_SPEED_100M_BIT BIT(3)
+#define HNS3_PHY_LINK_MODE_AUTONEG_BIT BIT(6)
+#define HNS3_PHY_LINK_MODE_PAUSE_BIT BIT(13)
+#define HNS3_PHY_LINK_MODE_ASYM_PAUSE_BIT BIT(14)
+
+#define HNS3_PHY_PARAM_CFG_BD_NUM 2
+struct hns3_phy_params_bd0_cmd {
+ uint32_t speed;
+#define HNS3_PHY_DUPLEX_CFG_B 0
+ uint8_t duplex;
+#define HNS3_PHY_AUTONEG_CFG_B 0
+ uint8_t autoneg;
+ uint8_t eth_tp_mdix;
+ uint8_t eth_tp_mdix_ctrl;
+ uint8_t port;
+ uint8_t transceiver;
+ uint8_t phy_address;
+ uint8_t rsv;
+ uint32_t supported;
+ uint32_t advertising;
+ uint32_t lp_advertising;
+};
+
+struct hns3_phy_params_bd1_cmd {
+ uint8_t master_slave_cfg;
+ uint8_t master_slave_state;
+ uint8_t rsv1[2];
+ uint32_t rsv2[5];
+};
+
#define HNS3_MAC_TX_EN_B 6
#define HNS3_MAC_RX_EN_B 7
#define HNS3_MAC_PAD_TX_B 11
return 0;
}
+static int
+hns3_check_media_type(struct hns3_hw *hw, uint8_t media_type)
+{
+ int ret;
+
+ switch (media_type) {
+ case HNS3_MEDIA_TYPE_COPPER:
+ if (!hns3_dev_copper_supported(hw)) {
+ PMD_INIT_LOG(ERR,
+ "Media type is copper, not supported.");
+ ret = -EOPNOTSUPP;
+ } else {
+ ret = 0;
+ }
+ break;
+ case HNS3_MEDIA_TYPE_FIBER:
+ ret = 0;
+ break;
+ case HNS3_MEDIA_TYPE_BACKPLANE:
+ PMD_INIT_LOG(ERR, "Media type is Backplane, not supported.");
+ ret = -EOPNOTSUPP;
+ break;
+ default:
+ PMD_INIT_LOG(ERR, "Unknown media type = %u!", media_type);
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
static int
hns3_get_board_configuration(struct hns3_hw *hw)
{
return ret;
}
- if (cfg.media_type == HNS3_MEDIA_TYPE_COPPER &&
- !hns3_dev_copper_supported(hw)) {
- PMD_INIT_LOG(ERR, "media type is copper, not supported.");
- return -EOPNOTSUPP;
- }
+ ret = hns3_check_media_type(hw, cfg.media_type);
+ if (ret)
+ return ret;
hw->mac.media_type = cfg.media_type;
hw->rss_size_max = cfg.rss_size_max;
if (is_init) {
hns3_set_bit(compat, HNS3_LINK_EVENT_REPORT_EN_B, 1);
hns3_set_bit(compat, HNS3_NCSI_ERROR_REPORT_EN_B, 0);
+ if (hw->mac.media_type == HNS3_MEDIA_TYPE_COPPER)
+ hns3_set_bit(compat, HNS3_FIRMWARE_PHY_DRIVER_EN_B, 1);
}
req->compat = rte_cpu_to_le_32(compat);
return hns3_cfg_mac_speed_dup(hw, speed, ETH_LINK_FULL_DUPLEX);
}
+static void
+hns3_parse_phy_params(struct hns3_cmd_desc *desc, struct hns3_mac *mac)
+{
+ struct hns3_phy_params_bd0_cmd *req;
+
+ req = (struct hns3_phy_params_bd0_cmd *)desc[0].data;
+ mac->link_speed = rte_le_to_cpu_32(req->speed);
+ mac->link_duplex = hns3_get_bit(req->duplex,
+ HNS3_PHY_DUPLEX_CFG_B);
+ mac->link_autoneg = hns3_get_bit(req->autoneg,
+ HNS3_PHY_AUTONEG_CFG_B);
+ mac->supported_capa = rte_le_to_cpu_32(req->supported);
+ mac->advertising = rte_le_to_cpu_32(req->advertising);
+ mac->lp_advertising = rte_le_to_cpu_32(req->lp_advertising);
+ mac->support_autoneg = !!(mac->supported_capa &
+ HNS3_PHY_LINK_MODE_AUTONEG_BIT);
+}
+
+static int
+hns3_get_phy_params(struct hns3_hw *hw, struct hns3_mac *mac)
+{
+ struct hns3_cmd_desc desc[HNS3_PHY_PARAM_CFG_BD_NUM];
+ uint16_t i;
+ int ret;
+
+ for (i = 0; i < HNS3_PHY_PARAM_CFG_BD_NUM - 1; i++) {
+ hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_PHY_PARAM_CFG,
+ true);
+ desc[i].flag |= rte_cpu_to_le_16(HNS3_CMD_FLAG_NEXT);
+ }
+ hns3_cmd_setup_basic_desc(&desc[i], HNS3_OPC_PHY_PARAM_CFG, true);
+
+ ret = hns3_cmd_send(hw, desc, HNS3_PHY_PARAM_CFG_BD_NUM);
+ if (ret) {
+ hns3_err(hw, "get phy parameters failed, ret = %d.", ret);
+ return ret;
+ }
+
+ hns3_parse_phy_params(desc, mac);
+
+ return 0;
+}
+
+static int
+hns3_update_phy_link_info(struct hns3_hw *hw)
+{
+ struct hns3_mac *mac = &hw->mac;
+ struct hns3_mac mac_info;
+ int ret;
+
+ memset(&mac_info, 0, sizeof(struct hns3_mac));
+ ret = hns3_get_phy_params(hw, &mac_info);
+ if (ret)
+ return ret;
+
+ if (mac_info.link_speed != mac->link_speed) {
+ ret = hns3_port_shaper_update(hw, mac_info.link_speed);
+ if (ret)
+ return ret;
+ }
+
+ mac->link_speed = mac_info.link_speed;
+ mac->link_duplex = mac_info.link_duplex;
+ mac->link_autoneg = mac_info.link_autoneg;
+ mac->supported_capa = mac_info.supported_capa;
+ mac->advertising = mac_info.advertising;
+ mac->lp_advertising = mac_info.lp_advertising;
+ mac->support_autoneg = mac_info.support_autoneg;
+
+ return 0;
+}
+
static int
hns3_update_link_info(struct rte_eth_dev *eth_dev)
{
int ret = 0;
if (hw->mac.media_type == HNS3_MEDIA_TYPE_COPPER)
- return 0;
+ ret = hns3_update_phy_link_info(hw);
else if (hw->mac.media_type == HNS3_MEDIA_TYPE_FIBER)
ret = hns3_update_fiber_link_info(hw);