]> git.droids-corp.org - dpdk.git/commitdiff
common/sfc_efx/base: add function control window concept
authorIgor Romanov <igor.romanov@oktetlabs.ru>
Thu, 24 Sep 2020 12:12:18 +0000 (13:12 +0100)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 30 Sep 2020 17:19:12 +0000 (19:19 +0200)
Function control window can be located at a different offset than
other windows on Riverhead. Meaning that the drivers must handle
accesses to the function control window differently in case of EF100.

Add accessor macros for function control window and change
EFX NIC create API to facilitate that accessors.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
drivers/common/sfc_efx/base/ef10_mcdi.c
drivers/common/sfc_efx/base/efx.h
drivers/common/sfc_efx/base/efx_impl.h
drivers/common/sfc_efx/base/efx_nic.c
drivers/common/sfc_efx/base/rhead_ev.c
drivers/common/sfc_efx/base/rhead_nic.c
drivers/net/sfc/sfc.c

index 727f14826ef4dfa93fc4d90d472bbe9a12b04d43..b324ec825b030d5f1a5f824800da36c36dd85d21 100644 (file)
@@ -56,7 +56,7 @@ ef10_mcdi_init(
        switch (enp->en_family) {
 #if EFSYS_OPT_RIVERHEAD
        case EFX_FAMILY_RIVERHEAD:
-               EFX_BAR_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword, B_FALSE);
+               EFX_BAR_FCW_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword);
                break;
 #endif /* EFSYS_OPT_RIVERHEAD */
        default:
@@ -166,7 +166,7 @@ ef10_mcdi_send_request(
        switch (enp->en_family) {
 #if EFSYS_OPT_RIVERHEAD
        case EFX_FAMILY_RIVERHEAD:
-               EFX_BAR_WRITED(enp, ER_GZ_MC_DB_LWRD_REG, &dword, B_FALSE);
+               EFX_BAR_FCW_WRITED(enp, ER_GZ_MC_DB_LWRD_REG, &dword);
                break;
 #endif /* EFSYS_OPT_RIVERHEAD */
        default:
@@ -179,7 +179,7 @@ ef10_mcdi_send_request(
        switch (enp->en_family) {
 #if EFSYS_OPT_RIVERHEAD
        case EFX_FAMILY_RIVERHEAD:
-               EFX_BAR_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword, B_FALSE);
+               EFX_BAR_FCW_WRITED(enp, ER_GZ_MC_DB_HWRD_REG, &dword);
                break;
 #endif /* EFSYS_OPT_RIVERHEAD */
        default:
@@ -237,11 +237,18 @@ ef10_mcdi_poll_reboot(
 
        old_status = emip->emi_mc_reboot_status;
 
-       EFX_STATIC_ASSERT(ER_DZ_BIU_MC_SFT_STATUS_REG_OFST ==
-           ER_GZ_MC_SFT_STATUS_OFST);
-
        /* Update MC reboot status word */
-       EFX_BAR_TBL_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG, 0, &dword, B_FALSE);
+       switch (enp->en_family) {
+#if EFSYS_OPT_RIVERHEAD
+       case EFX_FAMILY_RIVERHEAD:
+               EFX_BAR_FCW_READD(enp, ER_GZ_MC_SFT_STATUS, &dword);
+               break;
+#endif /* EFSYS_OPT_RIVERHEAD */
+       default:
+               EFX_BAR_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG,
+                             &dword, B_FALSE);
+               break;
+       }
        new_status = dword.ed_u32[0];
 
        /* MC has rebooted if the value has changed */
index 41222a71f145851e2546515a13e150e39dd0627e..1531b7f57f880ff62d84488f7460ae7918957368 100644 (file)
@@ -150,6 +150,7 @@ efx_nic_create(
        __in            efx_family_t family,
        __in            efsys_identifier_t *esip,
        __in            efsys_bar_t *esbp,
+       __in            uint32_t fcw_offset,
        __in            efsys_lock_t *eslp,
        __deref_out     efx_nic_t **enpp);
 
index fc0a654f805ad5b012532c56a1571b8db4e3787a..b1457f361a4fd0f75dc095e9da486b862c7ca347 100644 (file)
@@ -846,6 +846,7 @@ struct efx_nic_s {
                        int                     ena_vi_base;
                        int                     ena_vi_count;
                        int                     ena_vi_shift;
+                       uint32_t                ena_fcw_base;
 #if EFSYS_OPT_VPD
                        caddr_t                 ena_svpd;
                        size_t                  ena_svpd_length;
@@ -1114,6 +1115,9 @@ struct efx_txq_s {
  * Code used on EF10 *must* use EFX_BAR_VI_*() macros for per-VI registers,
  * to ensure the correct runtime VI window size is used on Medford2.
  *
+ * Code used on EF100 *must* use EFX_BAR_FCW_* macros for function control
+ * window registers, to ensure the correct starting offset is used.
+ *
  * Siena-only code may continue using EFX_BAR_TBL_*() macros for VI registers.
  */
 
@@ -1218,6 +1222,41 @@ struct efx_txq_s {
        _NOTE(CONSTANTCONDITION)                                        \
        } while (B_FALSE)
 
+/*
+ * Accessors for memory BAR function control window registers.
+ *
+ * The function control window is located at an offset which can be
+ * non-zero in case of Riverhead.
+ */
+
+#if EFSYS_OPT_RIVERHEAD
+
+#define        EFX_BAR_FCW_READD(_enp, _reg, _edp)                             \
+       do {                                                            \
+               EFX_CHECK_REG((_enp), (_reg));                          \
+               EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST +        \
+                   (_enp)->en_arch.ef10.ena_fcw_base,                  \
+                   (_edp), B_FALSE);                                   \
+               EFSYS_PROBE3(efx_bar_fcw_readd, const char *, #_reg,    \
+                   uint32_t, _reg ## _OFST,                            \
+                   uint32_t, (_edp)->ed_u32[0]);                       \
+       _NOTE(CONSTANTCONDITION)                                        \
+       } while (B_FALSE)
+
+#define        EFX_BAR_FCW_WRITED(_enp, _reg, _edp)                            \
+       do {                                                            \
+               EFX_CHECK_REG((_enp), (_reg));                          \
+               EFSYS_PROBE3(efx_bar_fcw_writed, const char *, #_reg,   \
+                   uint32_t, _reg ## _OFST,                            \
+                   uint32_t, (_edp)->ed_u32[0]);                       \
+               EFSYS_BAR_WRITED((_enp)->en_esbp, _reg ## _OFST +       \
+                   (_enp)->en_arch.ef10.ena_fcw_base,                  \
+                   (_edp), B_FALSE);                                   \
+       _NOTE(CONSTANTCONDITION)                                        \
+       } while (B_FALSE)
+
+#endif /* EFSYS_OPT_RIVERHEAD */
+
 /*
  * Accessors for memory BAR per-VI registers.
  *
index 465e2c7a36dfe8d79b3158f5ab95ce6c1dd9d93f..3dc287a095fd7c6c59489d91396caf1555e0e2d3 100644 (file)
@@ -215,6 +215,7 @@ efx_nic_create(
        __in            efx_family_t family,
        __in            efsys_identifier_t *esip,
        __in            efsys_bar_t *esbp,
+       __in            uint32_t fcw_offset,
        __in            efsys_lock_t *eslp,
        __deref_out     efx_nic_t **enpp)
 {
@@ -316,6 +317,7 @@ efx_nic_create(
                    EFX_FEATURE_MCDI |
                    EFX_FEATURE_MAC_HEADER_FILTERS |
                    EFX_FEATURE_MCDI_DMA;
+               enp->en_arch.ef10.ena_fcw_base = fcw_offset;
                break;
 #endif /* EFSYS_OPT_RIVERHEAD */
 
@@ -324,6 +326,11 @@ efx_nic_create(
                goto fail2;
        }
 
+       if ((family != EFX_FAMILY_RIVERHEAD) && (fcw_offset != 0)) {
+               rc = EINVAL;
+               goto fail3;
+       }
+
        enp->en_family = family;
        enp->en_esip = esip;
        enp->en_esbp = esbp;
@@ -333,6 +340,8 @@ efx_nic_create(
 
        return (0);
 
+fail3:
+       EFSYS_PROBE(fail3);
 fail2:
        EFSYS_PROBE(fail2);
 
index 380729d174c862403dfb1cb00e4dbf1e111cf1f0..8392a2be5b4dda8f99e661e596953b514586a6be 100644 (file)
@@ -133,7 +133,7 @@ rhead_ev_qprime(
        EFX_POPULATE_DWORD_2(dword, ERF_GZ_EVQ_ID, eep->ee_index,
            ERF_GZ_IDX, rptr);
        /* EVQ_INT_PRIME lives function control window only on Riverhead */
-       EFX_BAR_WRITED(enp, ER_GZ_EVQ_INT_PRIME, &dword, B_FALSE);
+       EFX_BAR_FCW_WRITED(enp, ER_GZ_EVQ_INT_PRIME, &dword);
 
        return (0);
 }
index 7fb28eae319becf1fa6253db3e0347fe892d9cff..a773a43bcc4483ab30e4d04c05c5f25a864a9d08 100644 (file)
@@ -456,7 +456,7 @@ rhead_nic_hw_unavailable(
        if (enp->en_reset_flags & EFX_RESET_HW_UNAVAIL)
                return (B_TRUE);
 
-       EFX_BAR_READD(enp, ER_GZ_MC_SFT_STATUS, &dword, B_FALSE);
+       EFX_BAR_FCW_READD(enp, ER_GZ_MC_SFT_STATUS, &dword);
        if (EFX_DWORD_FIELD(dword, EFX_DWORD_0) == 0xffffffff)
                goto unavail;
 
index 03ea5dc12858d5c14e78808182e4fd1c17f9a8c7..4be65c15dcf4557ccfa3442968a0412a6649db98 100644 (file)
@@ -1046,7 +1046,8 @@ sfc_probe(struct sfc_adapter *sa)
        sfc_log_init(sa, "create nic");
        rte_spinlock_init(&sa->nic_lock);
        rc = efx_nic_create(sa->family, (efsys_identifier_t *)sa,
-                           &sa->mem_bar, &sa->nic_lock, &enp);
+                           &sa->mem_bar, 0,
+                           &sa->nic_lock, &enp);
        if (rc != 0)
                goto fail_nic_create;
        sa->nic = enp;