]> git.droids-corp.org - dpdk.git/commitdiff
net/ice: fix Tx queue vector setup
authorAlvin Zhang <alvinx.zhang@intel.com>
Sat, 8 May 2021 03:11:28 +0000 (11:11 +0800)
committerQi Zhang <qi.z.zhang@intel.com>
Mon, 10 May 2021 02:58:55 +0000 (04:58 +0200)
If vector mode is not allowed for Tx, no need to perform vector
related setup for Tx queue.

The patch deferred vector setup for Tx queue to the place that
vector mode is confirmed to be allowed.

Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path")
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
drivers/net/ice/ice_rxtx.c

index 92fbbc18da14cbe8f28627af81973ffd50b9ad94..49abcb2f5cbd9e5976fe8e8b7f5957d18da13a6b 100644 (file)
@@ -3303,13 +3303,6 @@ ice_set_tx_function(struct rte_eth_dev *dev)
                if (tx_check_ret >= 0 &&
                    rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
                        ad->tx_vec_allowed = true;
-                       for (i = 0; i < dev->data->nb_tx_queues; i++) {
-                               txq = dev->data->tx_queues[i];
-                               if (txq && ice_txq_vec_setup(txq)) {
-                                       ad->tx_vec_allowed = false;
-                                       break;
-                               }
-                       }
 
                        if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&
                        rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
@@ -3329,6 +3322,15 @@ ice_set_tx_function(struct rte_eth_dev *dev)
                        if (!use_avx512 && tx_check_ret == ICE_VECTOR_OFFLOAD_PATH)
                                ad->tx_vec_allowed = false;
 
+                       if (ad->tx_vec_allowed) {
+                               for (i = 0; i < dev->data->nb_tx_queues; i++) {
+                                       txq = dev->data->tx_queues[i];
+                                       if (txq && ice_txq_vec_setup(txq)) {
+                                               ad->tx_vec_allowed = false;
+                                               break;
+                                       }
+                               }
+                       }
                } else {
                        ad->tx_vec_allowed = false;
                }